{"id":"https://openalex.org/W1597320966","doi":"https://doi.org/10.1109/icvd.2003.1183102","title":"India-building the tall, thin VLSI engineer","display_name":"India-building the tall, thin VLSI engineer","publication_year":2005,"publication_date":"2005-04-12","ids":{"openalex":"https://openalex.org/W1597320966","doi":"https://doi.org/10.1109/icvd.2003.1183102","mag":"1597320966"},"language":"en","primary_location":{"id":"doi:10.1109/icvd.2003.1183102","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icvd.2003.1183102","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th International Conference on VLSI Design, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014621452","display_name":"R. Madhavan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101851","display_name":"Magma (Germany)","ror":"https://ror.org/016a8y628","country_code":"DE","type":"company","lineage":["https://openalex.org/I4210101851"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"R. Madhavan","raw_affiliation_strings":["Magma Design Automation, USA","Magma Design Automation"],"affiliations":[{"raw_affiliation_string":"Magma Design Automation, USA","institution_ids":[]},{"raw_affiliation_string":"Magma Design Automation","institution_ids":["https://openalex.org/I4210101851"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5014621452"],"corresponding_institution_ids":["https://openalex.org/I4210101851"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06296312,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"5","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9606000185012817,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9606000185012817,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9563000202178955,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.946399986743927,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7085811495780945},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41076576709747314},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3914429843425751},{"id":"https://openalex.org/keywords/architectural-engineering","display_name":"Architectural engineering","score":0.3647063970565796},{"id":"https://openalex.org/keywords/construction-engineering","display_name":"Construction engineering","score":0.33416682481765747},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32380783557891846}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7085811495780945},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41076576709747314},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3914429843425751},{"id":"https://openalex.org/C170154142","wikidata":"https://www.wikidata.org/wiki/Q150737","display_name":"Architectural engineering","level":1,"score":0.3647063970565796},{"id":"https://openalex.org/C107053488","wikidata":"https://www.wikidata.org/wiki/Q2674423","display_name":"Construction engineering","level":1,"score":0.33416682481765747},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32380783557891846}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icvd.2003.1183102","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icvd.2003.1183102","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"16th International Conference on VLSI Design, 2003. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W4283025278","https://openalex.org/W2082432309","https://openalex.org/W817174743","https://openalex.org/W4254559750","https://openalex.org/W2998315020","https://openalex.org/W3016208414","https://openalex.org/W2050492524","https://openalex.org/W2104790384","https://openalex.org/W2349263281"],"abstract_inverted_index":{"With":[0],"logical":[1],"and":[2,40,47,52,57,86],"physical":[3,48],"design":[4],"melding":[5],"together,":[6],"an":[7],"opportunity":[8],"to":[9,24,77,88,95],"build":[10],"a":[11,26,34],"new":[12],"type":[13],"ofengineer":[14],"is":[15,91],"emerging":[16],"rapidly.":[17],"Powerful":[18],"tools":[19,39],"are":[20],"enabling":[21,74],"any":[22],"engineer":[23],"deliver":[25],"high":[27],"qualityof":[28],"results":[29],"once":[30],"possible":[31],"for":[32],"only":[33],"seasoned":[35,58],"designer.":[36,59],"These":[37],"leading-edge":[38],"technologiesare":[41],"changing":[42],"the":[43,61,75],"boundaries":[44],"between":[45,50,55],"logic":[46],"design,":[49],"system":[51],"chip":[53],"design,and":[54],"novice":[56],"Given":[60],"right":[62],"tools,":[63],"computer":[64],"scientists":[65],"andelectronics":[66],"engineers":[67],"both":[68],"can":[69],"play":[70],"pivotal":[71],"roles":[72],"in":[73,92],"transition":[76],"nanometer":[78],"system-on-chip":[79],"designs.":[80],"And":[81],"with":[82],"unparalleled":[83],"technical":[84],"prowess":[85],"aptitude":[87],"adapt,":[89],"India":[90],"thebest":[93],"position":[94],"lead":[96],"this":[97],"evolution.":[98]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}