{"id":"https://openalex.org/W1993475238","doi":"https://doi.org/10.1109/ictc.2013.6675495","title":"IEEE1588-based clock synchronization for embedded networked system with sRIO","display_name":"IEEE1588-based clock synchronization for embedded networked system with sRIO","publication_year":2013,"publication_date":"2013-10-01","ids":{"openalex":"https://openalex.org/W1993475238","doi":"https://doi.org/10.1109/ictc.2013.6675495","mag":"1993475238"},"language":"en","primary_location":{"id":"doi:10.1109/ictc.2013.6675495","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ictc.2013.6675495","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on ICT Convergence (ICTC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033521169","display_name":"Jong-Mok Jeon","orcid":null},"institutions":[{"id":"https://openalex.org/I31419693","display_name":"Kyungpook National University","ror":"https://ror.org/040c17130","country_code":"KR","type":"education","lineage":["https://openalex.org/I31419693"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jongmok Jeon","raw_affiliation_strings":["School of Electronics Engineering, Kyungpook National University, Daegu, Korea","[Sch. of Electron. Eng., Kyungpook Nat. Univ., Daegu, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Kyungpook National University, Daegu, Korea","institution_ids":["https://openalex.org/I31419693"]},{"raw_affiliation_string":"[Sch. of Electron. Eng., Kyungpook Nat. Univ., Daegu, South Korea]","institution_ids":["https://openalex.org/I31419693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011266210","display_name":"Donggil Kim","orcid":"https://orcid.org/0000-0002-8309-3606"},"institutions":[{"id":"https://openalex.org/I31419693","display_name":"Kyungpook National University","ror":"https://ror.org/040c17130","country_code":"KR","type":"education","lineage":["https://openalex.org/I31419693"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Donggil Kim","raw_affiliation_strings":["School of Electronics Engineering, Kyungpook National University, Daegu, Korea","[Sch. of Electron. Eng., Kyungpook Nat. Univ., Daegu, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Kyungpook National University, Daegu, Korea","institution_ids":["https://openalex.org/I31419693"]},{"raw_affiliation_string":"[Sch. of Electron. Eng., Kyungpook Nat. Univ., Daegu, South Korea]","institution_ids":["https://openalex.org/I31419693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046151850","display_name":"Dongik Lee","orcid":"https://orcid.org/0000-0003-2689-9846"},"institutions":[{"id":"https://openalex.org/I31419693","display_name":"Kyungpook National University","ror":"https://ror.org/040c17130","country_code":"KR","type":"education","lineage":["https://openalex.org/I31419693"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Dongik Lee","raw_affiliation_strings":["School of Electronics Engineering, Kyungpook National University, Daegu, Korea","[Sch. of Electron. Eng., Kyungpook Nat. Univ., Daegu, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Kyungpook National University, Daegu, Korea","institution_ids":["https://openalex.org/I31419693"]},{"raw_affiliation_string":"[Sch. of Electron. Eng., Kyungpook Nat. Univ., Daegu, South Korea]","institution_ids":["https://openalex.org/I31419693"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I31419693"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"843","last_page":"845"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12216","display_name":"Network Time Synchronization Technologies","score":0.8292999863624573,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12216","display_name":"Network Time Synchronization Technologies","score":0.8292999863624573,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.08399999886751175,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.01899999938905239,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-synchronization","display_name":"Clock synchronization","score":0.8683484792709351},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.8161218762397766},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7539600133895874},{"id":"https://openalex.org/keywords/data-synchronization","display_name":"Data synchronization","score":0.6445701718330383},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5830716490745544},{"id":"https://openalex.org/keywords/self-clocking-signal","display_name":"Self-clocking signal","score":0.567101240158081},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.5145992040634155},{"id":"https://openalex.org/keywords/clock-drift","display_name":"Clock drift","score":0.49557292461395264},{"id":"https://openalex.org/keywords/synchronization-networks","display_name":"Synchronization networks","score":0.4536917805671692},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4457821249961853},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34196674823760986},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.33610373735427856},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.19610387086868286},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.1907901167869568},{"id":"https://openalex.org/keywords/wireless-sensor-network","display_name":"Wireless sensor network","score":0.14768046140670776},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.10389795899391174},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.08502396941184998},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0575622022151947}],"concepts":[{"id":"https://openalex.org/C129891060","wikidata":"https://www.wikidata.org/wiki/Q1513059","display_name":"Clock synchronization","level":4,"score":0.8683484792709351},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.8161218762397766},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7539600133895874},{"id":"https://openalex.org/C108734733","wikidata":"https://www.wikidata.org/wiki/Q1172333","display_name":"Data synchronization","level":3,"score":0.6445701718330383},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5830716490745544},{"id":"https://openalex.org/C171051901","wikidata":"https://www.wikidata.org/wiki/Q2389679","display_name":"Self-clocking signal","level":5,"score":0.567101240158081},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.5145992040634155},{"id":"https://openalex.org/C155837451","wikidata":"https://www.wikidata.org/wiki/Q1069144","display_name":"Clock drift","level":5,"score":0.49557292461395264},{"id":"https://openalex.org/C111097370","wikidata":"https://www.wikidata.org/wiki/Q10969923","display_name":"Synchronization networks","level":4,"score":0.4536917805671692},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4457821249961853},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34196674823760986},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.33610373735427856},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.19610387086868286},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.1907901167869568},{"id":"https://openalex.org/C24590314","wikidata":"https://www.wikidata.org/wiki/Q336038","display_name":"Wireless sensor network","level":2,"score":0.14768046140670776},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.10389795899391174},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.08502396941184998},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0575622022151947},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ictc.2013.6675495","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ictc.2013.6675495","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on ICT Convergence (ICTC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1488202922","https://openalex.org/W2129542711","https://openalex.org/W2277595032","https://openalex.org/W6679231074"],"related_works":["https://openalex.org/W2147879203","https://openalex.org/W4384518564","https://openalex.org/W2056489071","https://openalex.org/W2152009219","https://openalex.org/W2006392656","https://openalex.org/W1966845705","https://openalex.org/W2389820945","https://openalex.org/W1924044602","https://openalex.org/W2789675190","https://openalex.org/W2157864354"],"abstract_inverted_index":{"Serial":[0],"RapidIO":[1],"(sRIO)":[2],"has":[3],"been":[4],"widely":[5],"used":[6],"for":[7,18,39,77],"switched":[8],"interconnection":[9],"of":[10,54,69],"embedded":[11,21,41],"systems.":[12],"Clock":[13],"synchronization":[14,37,67],"is":[15],"very":[16],"essential":[17],"a":[19,49],"networked":[20],"system":[22,42],"to":[23],"use":[24],"multiple":[25],"processors":[26,45],"that":[27,61],"are":[28,46],"separated.":[29],"This":[30],"paper":[31],"presents":[32],"an":[33,40,57],"IEEE1588":[34],"based":[35],"clock":[36],"method":[38],"in":[43],"which":[44],"interconnected":[47],"through":[48],"sRIO":[50],"network.":[51],"A":[52],"set":[53],"experiments":[55],"with":[56],"experimental":[58],"setup":[59],"demonstrate":[60],"the":[62,66],"proposed":[63],"approach":[64],"satisfies":[65],"precision":[68],"20":[70],"ms":[71],"without":[72],"using":[73],"any":[74],"extra":[75],"hardware":[76],"synchronization.":[78]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}