{"id":"https://openalex.org/W4390337210","doi":"https://doi.org/10.1109/icta60488.2023.10364301","title":"A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transceiver in 28-nm CMOS","display_name":"A 28/56 Gb/s NRZ/PAM-4 Dual-Mode Transceiver in 28-nm CMOS","publication_year":2023,"publication_date":"2023-10-27","ids":{"openalex":"https://openalex.org/W4390337210","doi":"https://doi.org/10.1109/icta60488.2023.10364301"},"language":"en","primary_location":{"id":"doi:10.1109/icta60488.2023.10364301","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icta60488.2023.10364301","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100303999","display_name":"Yukun He","orcid":"https://orcid.org/0009-0003-3341-2220"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yukun He","raw_affiliation_strings":["The School of Microelectronics, Xi'an Jiaotong University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The School of Microelectronics, Xi'an Jiaotong University","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103665935","display_name":"Zhao Yuan","orcid":null},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhao Yuan","raw_affiliation_strings":["The School of Microelectronics, Xi'an Jiaotong University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The School of Microelectronics, Xi'an Jiaotong University","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027944678","display_name":"Kanan Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kanan Wang","raw_affiliation_strings":["The School of Microelectronics, Xi'an Jiaotong University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The School of Microelectronics, Xi'an Jiaotong University","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113395298","display_name":"Renjie Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Renjie Tang","raw_affiliation_strings":["The School of Microelectronics, Xi'an Jiaotong University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The School of Microelectronics, Xi'an Jiaotong University","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007513738","display_name":"Yunxiang He","orcid":"https://orcid.org/0000-0002-6032-7908"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yunxiang He","raw_affiliation_strings":["The School of Microelectronics, Xi'an Jiaotong University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The School of Microelectronics, Xi'an Jiaotong University","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100380784","display_name":"Dan Li","orcid":"https://orcid.org/0000-0003-0721-3167"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dan Li","raw_affiliation_strings":["The School of Microelectronics, Xi'an Jiaotong University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The School of Microelectronics, Xi'an Jiaotong University","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043300709","display_name":"Li Geng","orcid":"https://orcid.org/0000-0003-4002-9281"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Geng","raw_affiliation_strings":["The School of Microelectronics, Xi'an Jiaotong University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The School of Microelectronics, Xi'an Jiaotong University","institution_ids":["https://openalex.org/I87445476"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027874968","display_name":"Xiaoyan Gui","orcid":"https://orcid.org/0000-0002-4463-6129"},"institutions":[{"id":"https://openalex.org/I87445476","display_name":"Xi'an Jiaotong University","ror":"https://ror.org/017zhmm22","country_code":"CN","type":"education","lineage":["https://openalex.org/I87445476"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoyan Gui","raw_affiliation_strings":["The School of Microelectronics, Xi'an Jiaotong University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The School of Microelectronics, Xi'an Jiaotong University","institution_ids":["https://openalex.org/I87445476"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1227,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.46984878,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"138","last_page":"139"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.8265998959541321},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.8084098100662231},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.7531291842460632},{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.7053418159484863},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.537461519241333},{"id":"https://openalex.org/keywords/equalizer","display_name":"Equalizer","score":0.49450060725212097},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.493294894695282},{"id":"https://openalex.org/keywords/burst-mode","display_name":"Burst mode (computing)","score":0.48635441064834595},{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.48171430826187134},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.47746753692626953},{"id":"https://openalex.org/keywords/dual-mode","display_name":"Dual mode","score":0.4618026614189148},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.4557764530181885},{"id":"https://openalex.org/keywords/serdes","display_name":"SerDes","score":0.43959158658981323},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4091046154499054},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.3499932289123535},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3113781809806824},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.08743184804916382}],"concepts":[{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.8265998959541321},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.8084098100662231},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.7531291842460632},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.7053418159484863},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.537461519241333},{"id":"https://openalex.org/C67545415","wikidata":"https://www.wikidata.org/wiki/Q5384218","display_name":"Equalizer","level":3,"score":0.49450060725212097},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.493294894695282},{"id":"https://openalex.org/C2779760598","wikidata":"https://www.wikidata.org/wiki/Q1017053","display_name":"Burst mode (computing)","level":2,"score":0.48635441064834595},{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.48171430826187134},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.47746753692626953},{"id":"https://openalex.org/C3019325349","wikidata":"https://www.wikidata.org/wiki/Q3874753","display_name":"Dual mode","level":2,"score":0.4618026614189148},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.4557764530181885},{"id":"https://openalex.org/C19707634","wikidata":"https://www.wikidata.org/wiki/Q6510662","display_name":"SerDes","level":2,"score":0.43959158658981323},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4091046154499054},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.3499932289123535},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3113781809806824},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.08743184804916382},{"id":"https://openalex.org/C160030872","wikidata":"https://www.wikidata.org/wiki/Q2142864","display_name":"Step response","level":2,"score":0.0},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icta60488.2023.10364301","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icta60488.2023.10364301","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G4559092663","display_name":null,"funder_award_id":"62174132","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1592084739","https://openalex.org/W2570488823","https://openalex.org/W2899541480","https://openalex.org/W3132889034"],"related_works":["https://openalex.org/W2327646985","https://openalex.org/W1970203393","https://openalex.org/W2321388160","https://openalex.org/W2145589741","https://openalex.org/W2282260532","https://openalex.org/W2151087042","https://openalex.org/W4285186329","https://openalex.org/W4321615221","https://openalex.org/W2105288882","https://openalex.org/W2550327407"],"abstract_inverted_index":{"A":[0,51],"28/56":[1],"Gb/s":[2,74],"NRZ/PAM-4":[3],"Dual-mode":[4],"Transceiver":[5],"(TRx)":[6],"in":[7,62],"a":[8,19,23,34,39,44,91],"28-nm":[9],"CMOS":[10],"process":[11],"is":[12,55],"presented.":[13],"The":[14,29,81],"quarter-rate":[15],"transmitter":[16],"(TX)":[17],"incorporates":[18],"voltage-mode":[20],"driver":[21],"with":[22,78],"4-tap":[24],"feed":[25],"forward":[26],"equalizer":[27,37],"(FFE).":[28],"half-rate":[30],"receiver":[31],"(RX)":[32],"employs":[33],"continuous-time":[35],"linear":[36],"(CTLE),":[38],"3-stage":[40],"high-speed":[41,52],"slicer":[42],"and":[43,47,83,87],"digital":[45],"clock":[46],"data":[48,76],"recovery":[49],"(CDR).":[50],"track-and-regenerate":[53],"comparator":[54],"proposed":[56],"to":[57],"improve":[58],"the":[59,63,70],"settling":[60],"time":[61],"RX":[64,84],"slicer.":[65],"Measured":[66],"results":[67],"show":[68],"that":[69],"TRx":[71],"achieves":[72],"56":[73],"maximum":[75],"rate":[77],"chip-on-board":[79],"assembly.":[80],"TX":[82],"dissipate":[85],"125mW":[86],"181.4mW":[88],"power":[89],"from":[90],"0.9V":[92],"supply,":[93],"respectively.":[94]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}