{"id":"https://openalex.org/W3128733743","doi":"https://doi.org/10.1109/icta50426.2020.9331982","title":"Design and Development for CIS-WLCSP Using Vertical TSV Technology","display_name":"Design and Development for CIS-WLCSP Using Vertical TSV Technology","publication_year":2020,"publication_date":"2020-11-23","ids":{"openalex":"https://openalex.org/W3128733743","doi":"https://doi.org/10.1109/icta50426.2020.9331982","mag":"3128733743"},"language":"en","primary_location":{"id":"doi:10.1109/icta50426.2020.9331982","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icta50426.2020.9331982","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000080386","display_name":"Tianshen Zhou","orcid":null},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Tianshen Zhou","raw_affiliation_strings":["Materials Sci. & Eng., Shanghai Jiao Tong University"],"affiliations":[{"raw_affiliation_string":"Materials Sci. & Eng., Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052463808","display_name":"Shuying Ma","orcid":"https://orcid.org/0009-0007-2294-0107"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Shuying Ma","raw_affiliation_strings":["Huatian Technology (Kunshan) Electronics Co., Ltd"],"affiliations":[{"raw_affiliation_string":"Huatian Technology (Kunshan) Electronics Co., Ltd","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021936819","display_name":"Tao Hang","orcid":"https://orcid.org/0000-0001-6902-0788"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tao Hang","raw_affiliation_strings":["Materials Sci. & Eng., Shanghai Jiao Tong University"],"affiliations":[{"raw_affiliation_string":"Materials Sci. & Eng., Shanghai Jiao Tong University","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089339248","display_name":"Ming Xiang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ming Xiang","raw_affiliation_strings":["Huatian Technology (Kunshan) Electronics Co., Ltd"],"affiliations":[{"raw_affiliation_string":"Huatian Technology (Kunshan) Electronics Co., Ltd","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5000080386"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16056603,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2","issue":null,"first_page":"119","last_page":"120"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10460","display_name":"Electronic Packaging and Soldering Technologies","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10369","display_name":"Advanced MEMS and NEMS Technologies","score":0.9832000136375427,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/chip-scale-package","display_name":"Chip-scale package","score":0.9160720109939575},{"id":"https://openalex.org/keywords/wafer-level-packaging","display_name":"Wafer-level packaging","score":0.6890760064125061},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6872564554214478},{"id":"https://openalex.org/keywords/passivation","display_name":"Passivation","score":0.5710785388946533},{"id":"https://openalex.org/keywords/wafer","display_name":"Wafer","score":0.5453445911407471},{"id":"https://openalex.org/keywords/wafer-scale-integration","display_name":"Wafer-scale integration","score":0.5222283601760864},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.4833616614341736},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.45263680815696716},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.4377059042453766},{"id":"https://openalex.org/keywords/finite-element-method","display_name":"Finite element method","score":0.4195970892906189},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3705434203147888},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3649486303329468},{"id":"https://openalex.org/keywords/structural-engineering","display_name":"Structural engineering","score":0.25973814725875854},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24256378412246704},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2147493064403534},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.2044355571269989},{"id":"https://openalex.org/keywords/composite-material","display_name":"Composite material","score":0.10576707124710083}],"concepts":[{"id":"https://openalex.org/C126233035","wikidata":"https://www.wikidata.org/wiki/Q5101572","display_name":"Chip-scale package","level":3,"score":0.9160720109939575},{"id":"https://openalex.org/C2780288131","wikidata":"https://www.wikidata.org/wiki/Q4017648","display_name":"Wafer-level packaging","level":3,"score":0.6890760064125061},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6872564554214478},{"id":"https://openalex.org/C33574316","wikidata":"https://www.wikidata.org/wiki/Q917260","display_name":"Passivation","level":3,"score":0.5710785388946533},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.5453445911407471},{"id":"https://openalex.org/C2778638305","wikidata":"https://www.wikidata.org/wiki/Q7406100","display_name":"Wafer-scale integration","level":3,"score":0.5222283601760864},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.4833616614341736},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.45263680815696716},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.4377059042453766},{"id":"https://openalex.org/C135628077","wikidata":"https://www.wikidata.org/wiki/Q220184","display_name":"Finite element method","level":2,"score":0.4195970892906189},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3705434203147888},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3649486303329468},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.25973814725875854},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24256378412246704},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2147493064403534},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.2044355571269989},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.10576707124710083},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icta50426.2020.9331982","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icta50426.2020.9331982","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.41999998688697815,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1508984872","https://openalex.org/W2012182877","https://openalex.org/W2102014162","https://openalex.org/W2138637263","https://openalex.org/W2169924167","https://openalex.org/W2573563304","https://openalex.org/W3203992401"],"related_works":["https://openalex.org/W2156194080","https://openalex.org/W4391678138","https://openalex.org/W4200597737","https://openalex.org/W2136374712","https://openalex.org/W3146796940","https://openalex.org/W3022215011","https://openalex.org/W2089003336","https://openalex.org/W4236626978","https://openalex.org/W4246719889","https://openalex.org/W3023339571"],"abstract_inverted_index":{"Wafer-level":[0],"chip":[1],"scale":[2],"packaging":[3],"(WLCSP)":[4],"using":[5,31],"TSV":[6,33],"technology":[7],"has":[8],"widely":[9],"used":[10,60],"in":[11,17,47],"CMOS":[12],"image":[13],"sensor":[14],"(CIS)":[15],"products":[16],"mass":[18],"production.":[19],"With":[20],"more":[21],"IO":[22],"and":[23,63,90],"high":[24],"reliability":[25,49],"requirements,":[26],"the":[27,37,64,76],"new":[28,77],"CIS-WLCSP":[29,94],"structure":[30],"vertical":[32,97],"was":[34,59,87],"developed.":[35],"However,":[36],"isolation":[38],"layer":[39,81,86],"deposited":[40],"by":[41,69],"low-temperature":[42],"PECVD":[43],"suffer":[44],"crack":[45],"failure":[46],"strict":[48],"test.":[50],"To":[51],"solve":[52],"this":[53],"problem,":[54],"finite":[55],"element":[56],"simulation":[57,65],"tool":[58],"for":[61,93],"evaluation":[62],"results":[66,74],"were":[67],"verified":[68],"design":[70,78],"of":[71],"experiment.":[72],"Both":[73],"showed":[75],"with":[79],"passivation":[80],"introduced":[82],"as":[83],"stress":[84],"buffer":[85],"an":[88],"effective":[89],"reliable":[91],"solution":[92],"based":[95],"on":[96],"TSV.":[98]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}