{"id":"https://openalex.org/W4391307970","doi":"https://doi.org/10.1109/icspcc59353.2023.10400375","title":"A System Verilog Based Networked Verification and Testing Method for Wireless Network Protocols on Chip","display_name":"A System Verilog Based Networked Verification and Testing Method for Wireless Network Protocols on Chip","publication_year":2023,"publication_date":"2023-11-14","ids":{"openalex":"https://openalex.org/W4391307970","doi":"https://doi.org/10.1109/icspcc59353.2023.10400375"},"language":"en","primary_location":{"id":"doi:10.1109/icspcc59353.2023.10400375","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/icspcc59353.2023.10400375","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Conference on Signal Processing, Communications and Computing (ICSPCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100333004","display_name":"Jie Chen","orcid":"https://orcid.org/0000-0003-2306-8860"},"institutions":[{"id":"https://openalex.org/I17145004","display_name":"Northwestern Polytechnical University","ror":"https://ror.org/01y0j0j86","country_code":"CN","type":"education","lineage":["https://openalex.org/I17145004"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jie Chen","raw_affiliation_strings":["School of Electronics and Information, Northwestern Polytechnical University,Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Electronics and Information, Northwestern Polytechnical University,Xi&#x0027;an,China","institution_ids":["https://openalex.org/I17145004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106974698","display_name":"Bo Li","orcid":null},"institutions":[{"id":"https://openalex.org/I17145004","display_name":"Northwestern Polytechnical University","ror":"https://ror.org/01y0j0j86","country_code":"CN","type":"education","lineage":["https://openalex.org/I17145004"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Bo Li","raw_affiliation_strings":["School of Electronics and Information, Northwestern Polytechnical University,Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Electronics and Information, Northwestern Polytechnical University,Xi&#x0027;an,China","institution_ids":["https://openalex.org/I17145004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038792149","display_name":"Zhongjiang Yan","orcid":"https://orcid.org/0000-0003-2806-5343"},"institutions":[{"id":"https://openalex.org/I17145004","display_name":"Northwestern Polytechnical University","ror":"https://ror.org/01y0j0j86","country_code":"CN","type":"education","lineage":["https://openalex.org/I17145004"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhongjiang Yan","raw_affiliation_strings":["School of Electronics and Information, Northwestern Polytechnical University,Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Electronics and Information, Northwestern Polytechnical University,Xi&#x0027;an,China","institution_ids":["https://openalex.org/I17145004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102979785","display_name":"Mao Yang","orcid":"https://orcid.org/0000-0001-6081-1006"},"institutions":[{"id":"https://openalex.org/I17145004","display_name":"Northwestern Polytechnical University","ror":"https://ror.org/01y0j0j86","country_code":"CN","type":"education","lineage":["https://openalex.org/I17145004"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Mao Yang","raw_affiliation_strings":["School of Electronics and Information, Northwestern Polytechnical University,Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Electronics and Information, Northwestern Polytechnical University,Xi&#x0027;an,China","institution_ids":["https://openalex.org/I17145004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100333004"],"corresponding_institution_ids":["https://openalex.org/I17145004"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.21184045,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9944999814033508,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9772999882698059,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9527999758720398,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7856783270835876},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.7065658569335938},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5880696773529053},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5448169708251953},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4421547055244446},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.43506547808647156},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3829003572463989},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3748704791069031},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2125244438648224},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15991300344467163},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07499170303344727}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7856783270835876},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.7065658569335938},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5880696773529053},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5448169708251953},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4421547055244446},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.43506547808647156},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3829003572463989},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3748704791069031},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2125244438648224},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15991300344467163},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07499170303344727}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icspcc59353.2023.10400375","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/icspcc59353.2023.10400375","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Conference on Signal Processing, Communications and Computing (ICSPCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2138285393","https://openalex.org/W2889489191","https://openalex.org/W3093629403","https://openalex.org/W4220904958","https://openalex.org/W4327767753","https://openalex.org/W4363620151","https://openalex.org/W4366250347","https://openalex.org/W4379984635","https://openalex.org/W6676865633"],"related_works":["https://openalex.org/W1761969858","https://openalex.org/W2391854357","https://openalex.org/W3131627289","https://openalex.org/W3114194214","https://openalex.org/W2132512458","https://openalex.org/W2502691491","https://openalex.org/W4238487776","https://openalex.org/W2115579119","https://openalex.org/W2017236304","https://openalex.org/W3142211975"],"abstract_inverted_index":{"Wireless":[0],"Network":[1],"Protocols":[2],"on":[3],"Chip":[4],"(WNPC)":[5],"is":[6,47,99,184],"a":[7,36,53,64,91],"hardware":[8],"module":[9,114,123,145],"with":[10,155,209],"communication":[11],"networking":[12],"functions.":[13],"Aiming":[14],"at":[15],"the":[16,28,87,111,119,138,156,161,164,167,176,181,195,210],"problem":[17],"of":[18,32,55,66,90,115,141,169,197],"low":[19],"WNPC":[20,46],"function":[21,73],"verification":[22,95],"and":[23,30,42,59,68,72,83,96,108,134,137],"testing":[24],"efficiency":[25],"caused":[26],"by":[27,203],"complexity":[29],"particularity":[31],"wireless":[33,120,131],"network":[34,56,78,132,147,190],"environment,":[35],"SystemVerilog":[37],"(SV)":[38],"based":[39],"Networked":[40],"Verification":[41],"Testing":[43],"Method":[44],"for":[45,105,146,188],"proposed,":[48],"which":[49],"can":[50,125],"flexibly":[51],"configure":[52],"variety":[54,65],"application":[57],"scenarios":[58],"node":[60,107,127],"attributes,":[61],"adapt":[62],"to":[63,200],"protocols,":[67],"test":[69,97,159,170,198],"its":[70],"code":[71],"coverage,":[74],"as":[75,77,81],"well":[76],"performance":[79,148],"such":[80],"throughput":[82],"average":[84],"delay.":[85],"Firstly,":[86],"overall":[88],"architecture":[89],"layer-based":[92],"networked":[93],"functional":[94,103],"platform":[98],"designed,":[100],"including":[101],"five":[102],"modules":[104],"single":[106],"network.":[109],"Secondly,":[110],"protocol":[112],"adaptation":[113],"single-node":[116],"general":[117],"WNPC,":[118],"channel":[121,129],"arbitrator":[122],"that":[124,180],"simulate":[126],"movement,":[128],"fading,":[130],"topology":[133],"data":[135],"exchange,":[136],"design":[139],"method":[140,183],"simulation":[142,177],"result":[143],"statistics":[144],"are":[149],"introduced":[150],"in":[151,166,172],"detail.":[152],"Then,":[153],"compared":[154,208],"traditional":[157,211],"single-module":[158,212],"method,":[160],"analysis":[162],"shows":[163],"reduction":[165],"number":[168,196],"vectors":[171,199],"this":[173],"method.":[174],"Finally,":[175],"results":[178],"show":[179],"proposed":[182],"not":[185],"only":[186],"suitable":[187],"multiple":[189],"topologies,":[191],"but":[192],"also":[193],"reduces":[194],"be":[201],"covered":[202],"about":[204],"45.7<sup":[205],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[206],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">%</sup>":[207],"test.":[213]},"counts_by_year":[],"updated_date":"2025-12-25T23:11:45.687758","created_date":"2025-10-10T00:00:00"}