{"id":"https://openalex.org/W3209829092","doi":"https://doi.org/10.1109/icspcc52875.2021.9564439","title":"An Efficient & Programmable FPGA-Based Approach for Fast-Tuning Silicon CPU Design for Embedded Systems","display_name":"An Efficient & Programmable FPGA-Based Approach for Fast-Tuning Silicon CPU Design for Embedded Systems","publication_year":2021,"publication_date":"2021-08-17","ids":{"openalex":"https://openalex.org/W3209829092","doi":"https://doi.org/10.1109/icspcc52875.2021.9564439","mag":"3209829092"},"language":"en","primary_location":{"id":"doi:10.1109/icspcc52875.2021.9564439","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icspcc52875.2021.9564439","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Conference on Signal Processing, Communications and Computing (ICSPCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113096298","display_name":"C.C. Tsang","orcid":null},"institutions":[{"id":"https://openalex.org/I2800906782","display_name":"Hong Kong Science and Technology Parks Corporation","ror":"https://ror.org/05q8mqd91","country_code":"HK","type":"nonprofit","lineage":["https://openalex.org/I2800906782"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"C. C. Tsang","raw_affiliation_strings":["High Tech Technology Limited Hong Kong Science & Technology Park, Hong Kong, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"High Tech Technology Limited Hong Kong Science & Technology Park, Hong Kong, China","institution_ids":["https://openalex.org/I2800906782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065462834","display_name":"Steve Chim","orcid":null},"institutions":[{"id":"https://openalex.org/I2800906782","display_name":"Hong Kong Science and Technology Parks Corporation","ror":"https://ror.org/05q8mqd91","country_code":"HK","type":"nonprofit","lineage":["https://openalex.org/I2800906782"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Steve Chim","raw_affiliation_strings":["High Tech Technology Limited Hong Kong Science & Technology Park, Hong Kong, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"High Tech Technology Limited Hong Kong Science & Technology Park, Hong Kong, China","institution_ids":["https://openalex.org/I2800906782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037596078","display_name":"Andy Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I2800906782","display_name":"Hong Kong Science and Technology Parks Corporation","ror":"https://ror.org/05q8mqd91","country_code":"HK","type":"nonprofit","lineage":["https://openalex.org/I2800906782"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Andy Wu","raw_affiliation_strings":["High Tech Technology Limited Hong Kong Science & Technology Park, Hong Kong, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"High Tech Technology Limited Hong Kong Science & Technology Park, Hong Kong, China","institution_ids":["https://openalex.org/I2800906782"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012666173","display_name":"Gordon Ip","orcid":null},"institutions":[{"id":"https://openalex.org/I59433898","display_name":"Brunel University of London","ror":"https://ror.org/00dn4t376","country_code":"GB","type":"education","lineage":["https://openalex.org/I124357947","https://openalex.org/I59433898"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Gordon Ip","raw_affiliation_strings":["Aerospace, Aeronautical and Astronautical Engineering, Brunel University, London, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Aerospace, Aeronautical and Astronautical Engineering, Brunel University, London, UK","institution_ids":["https://openalex.org/I59433898"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100701962","display_name":"Albert Lee","orcid":"https://orcid.org/0000-0002-0258-181X"},"institutions":[{"id":"https://openalex.org/I889458895","display_name":"University of Hong Kong","ror":"https://ror.org/02zhqgq86","country_code":"HK","type":"education","lineage":["https://openalex.org/I889458895"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Albert Lee","raw_affiliation_strings":["The University of Hong Kong, Hong Kong, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Hong Kong, Hong Kong, China","institution_ids":["https://openalex.org/I889458895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067085786","display_name":"Ka-Chun Lam","orcid":null},"institutions":[{"id":"https://openalex.org/I889458895","display_name":"University of Hong Kong","ror":"https://ror.org/02zhqgq86","country_code":"HK","type":"education","lineage":["https://openalex.org/I889458895"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"K. H. Lam","raw_affiliation_strings":["The University of Hong Kong, Hong Kong, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Hong Kong, Hong Kong, China","institution_ids":["https://openalex.org/I889458895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072120057","display_name":"Ngai Wong","orcid":"https://orcid.org/0000-0002-3026-0108"},"institutions":[{"id":"https://openalex.org/I889458895","display_name":"University of Hong Kong","ror":"https://ror.org/02zhqgq86","country_code":"HK","type":"education","lineage":["https://openalex.org/I889458895"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"N. Wong","raw_affiliation_strings":["The University of Hong Kong, Hong Kong, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Hong Kong, Hong Kong, China","institution_ids":["https://openalex.org/I889458895"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006360678","display_name":"David C. Ng","orcid":"https://orcid.org/0000-0001-9379-9322"},"institutions":[{"id":"https://openalex.org/I889458895","display_name":"University of Hong Kong","ror":"https://ror.org/02zhqgq86","country_code":"HK","type":"education","lineage":["https://openalex.org/I889458895"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"David Ng","raw_affiliation_strings":["The University of Hong Kong, Hong Kong, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Hong Kong, Hong Kong, China","institution_ids":["https://openalex.org/I889458895"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":8,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12433765,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.819127082824707},{"id":"https://openalex.org/keywords/universal-asynchronous-receiver/transmitter","display_name":"Universal asynchronous receiver/transmitter","score":0.7538851499557495},{"id":"https://openalex.org/keywords/debugger","display_name":"Debugger","score":0.6425189971923828},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6125362515449524},{"id":"https://openalex.org/keywords/programmer","display_name":"Programmer","score":0.5698402523994446},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.5418340563774109},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4462955594062805},{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.42498543858528137},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.422147274017334},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.41804227232933044},{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.4167412519454956},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.4123249650001526},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.4108319878578186},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20655608177185059},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1501052975654602},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.11511531472206116}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.819127082824707},{"id":"https://openalex.org/C161911788","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Universal asynchronous receiver/transmitter","level":3,"score":0.7538851499557495},{"id":"https://openalex.org/C2778485113","wikidata":"https://www.wikidata.org/wiki/Q193231","display_name":"Debugger","level":3,"score":0.6425189971923828},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6125362515449524},{"id":"https://openalex.org/C2778514511","wikidata":"https://www.wikidata.org/wiki/Q1374194","display_name":"Programmer","level":2,"score":0.5698402523994446},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.5418340563774109},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4462955594062805},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.42498543858528137},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.422147274017334},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.41804227232933044},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.4167412519454956},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.4123249650001526},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.4108319878578186},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20655608177185059},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1501052975654602},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.11511531472206116},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icspcc52875.2021.9564439","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icspcc52875.2021.9564439","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Conference on Signal Processing, Communications and Computing (ICSPCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6399999856948853,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1987813276","https://openalex.org/W2129729446","https://openalex.org/W2134917170","https://openalex.org/W2151361810"],"related_works":["https://openalex.org/W2387062115","https://openalex.org/W2349952634","https://openalex.org/W2374064173","https://openalex.org/W2387987163","https://openalex.org/W2384287245","https://openalex.org/W3172574134","https://openalex.org/W2364820253","https://openalex.org/W2136295006","https://openalex.org/W1937259677","https://openalex.org/W2366672283"],"abstract_inverted_index":{"Given":[0],"the":[1,33],"increasing":[2],"complexity":[3],"of":[4,23,78,90],"modern":[5],"Application-specific":[6],"Integrated":[7],"Circuits":[8],"(ASIC),":[9],"design":[10,89],"verification":[11,29],"becomes":[12],"a":[13,40,48,68],"tedious":[14],"process":[15],"for":[16,71],"digital":[17],"system":[18,116],"engineers":[19],"[1].":[20],"In":[21,37],"view":[22],"this,":[24],"an":[25,97],"efficient":[26],"and":[27,61,73,93],"reliable":[28],"scheme":[30],"would":[31],"benefit":[32],"IC":[34,85],"development":[35],"community.":[36],"this":[38,91],"paper,":[39],"programmer":[41,92],"(We":[42],"can":[43],"also":[44,105],"call":[45],"it":[46],"as":[47],"debugger)":[49],"including":[50],"UART":[51],"(universal":[52],"asynchronous":[53],"receiver/transmitter),":[54],"protocol":[55],"parser":[56],"finite":[57],"state":[58],"machine":[59],"(FSM),":[60],"memory":[62],"interface":[63],"is":[64,102],"introduced.":[65],"It":[66],"offers":[67],"holistic":[69],"infrastructure":[70],"programming":[72],"debugging":[74],"silicon":[75],"CPU":[76],"designs":[77],"embedded":[79],"systems":[80],"in":[81],"order":[82],"to":[83,96,113],"facilitate":[84],"performance":[86],"validation.":[87],"The":[88],"its":[94],"integration":[95],"8051":[98],"micro-controller":[99],"unit":[100],"(MCU)":[101],"presented.":[103],"We":[104],"provide":[106],"Hardware":[107],"Description":[108],"Language":[109],"(HDL)":[110],"simulation":[111],"results":[112],"prove":[114],"our":[115],"feasibility.":[117]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}