{"id":"https://openalex.org/W1584758265","doi":"https://doi.org/10.1109/icsmc.2005.1571742","title":"Using FPGA Technology Towards the Design of an Adaptive Fault Tolerant Framework","display_name":"Using FPGA Technology Towards the Design of an Adaptive Fault Tolerant Framework","publication_year":2006,"publication_date":"2006-01-18","ids":{"openalex":"https://openalex.org/W1584758265","doi":"https://doi.org/10.1109/icsmc.2005.1571742","mag":"1584758265"},"language":"en","primary_location":{"id":"doi:10.1109/icsmc.2005.1571742","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icsmc.2005.1571742","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Conference on Systems, Man and Cybernetics","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110207998","display_name":"S.S. Erdogan","orcid":null},"institutions":[{"id":"https://openalex.org/I35722693","display_name":"University of Hawaii at Hilo","ror":"https://ror.org/02mp2av58","country_code":"US","type":"education","lineage":["https://openalex.org/I35722693"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Erdogan","raw_affiliation_strings":["University of Hawai, Hilo, HI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Hawai, Hilo, HI, USA","institution_ids":["https://openalex.org/I35722693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027625657","display_name":"Judith L. Gersting","orcid":null},"institutions":[{"id":"https://openalex.org/I35722693","display_name":"University of Hawaii at Hilo","ror":"https://ror.org/02mp2av58","country_code":"US","type":"education","lineage":["https://openalex.org/I35722693"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.L. Gersting","raw_affiliation_strings":["University of Hawai, Hilo, HI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Hawai, Hilo, HI, USA","institution_ids":["https://openalex.org/I35722693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050644299","display_name":"Ted Shaneyfelt","orcid":null},"institutions":[{"id":"https://openalex.org/I35722693","display_name":"University of Hawaii at Hilo","ror":"https://ror.org/02mp2av58","country_code":"US","type":"education","lineage":["https://openalex.org/I35722693"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Shaneyfelt","raw_affiliation_strings":["University of Hawai, Hilo, HI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Hawai, Hilo, HI, USA","institution_ids":["https://openalex.org/I35722693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030724162","display_name":"Eugene L. Duke","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"E.L. Duke","raw_affiliation_strings":["Rain Mountain Systems Incorporated, HI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Rain Mountain Systems Incorporated, HI, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2232,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.3652351,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"4","issue":null,"first_page":"3823","last_page":"3827"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8464024662971497},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.7645063400268555},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7597650289535522},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.7590159773826599},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6994876265525818},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6900665163993835},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4686179757118225},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.46568647027015686},{"id":"https://openalex.org/keywords/software-fault-tolerance","display_name":"Software fault tolerance","score":0.46348029375076294},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.4107646048069},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33984601497650146},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08546867966651917}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8464024662971497},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.7645063400268555},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7597650289535522},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.7590159773826599},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6994876265525818},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6900665163993835},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4686179757118225},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.46568647027015686},{"id":"https://openalex.org/C50712370","wikidata":"https://www.wikidata.org/wiki/Q4269346","display_name":"Software fault tolerance","level":3,"score":0.46348029375076294},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.4107646048069},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33984601497650146},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08546867966651917},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icsmc.2005.1571742","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icsmc.2005.1571742","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 IEEE International Conference on Systems, Man and Cybernetics","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1492200690","https://openalex.org/W1517470793","https://openalex.org/W1548352889","https://openalex.org/W1591412383","https://openalex.org/W1981771484","https://openalex.org/W2008165887","https://openalex.org/W2045396087","https://openalex.org/W2086240295","https://openalex.org/W2099746521","https://openalex.org/W2110292316","https://openalex.org/W2111171161","https://openalex.org/W2119699246","https://openalex.org/W2120295190","https://openalex.org/W2128430444","https://openalex.org/W2146355280","https://openalex.org/W2165099691","https://openalex.org/W2503643606","https://openalex.org/W2939181870","https://openalex.org/W4230687063","https://openalex.org/W4285719527","https://openalex.org/W6676353802","https://openalex.org/W6676540082","https://openalex.org/W6677999671","https://openalex.org/W6681230160","https://openalex.org/W6762569848"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2340647897","https://openalex.org/W2941434274","https://openalex.org/W2096938998","https://openalex.org/W1760305469","https://openalex.org/W2385177848","https://openalex.org/W2103526090","https://openalex.org/W2130594209"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"propose":[4],"architecture":[5],"for":[6,13,141],"a":[7,58,88,97,115,122,138],"reconfigurable,":[8],"adaptive,":[9],"fault-tolerant":[10,33],"(RAFT)":[11],"framework":[12,41,77],"application":[14,28],"in":[15,73],"real":[16],"time":[17],"systems":[18],"with":[19,49],"require":[20],"multiple":[21],"levels":[22,133],"of":[23,57,83,134],"redundancy":[24],"and":[25,35,37],"protection.":[26],"Typical":[27],"environments":[29],"include":[30],"distributed":[31],"processing,":[32],"computation,":[34],"mission":[36],"safety-critical":[38],"systems.":[39],"The":[40,76,107],"uses":[42],"field":[43],"programmable":[44],"gate":[45],"array":[46,82],"(FPGA)":[47],"technologies":[48],"on":[50],"the":[51,62,74,79,127,142],"fly":[52],"partial":[53],"programmability":[54],"achieving":[55],"reconfiguration":[56],"system":[59,89,123,128,143],"component":[60],"when":[61],"existing":[63],"components":[64],"fail":[65],"or":[66],"to":[67,86,103,130],"provide":[68],"extra":[69],"reliability":[70,135],"as":[71],"required":[72],"specification.":[75],"proposes":[78],"use":[80],"an":[81,93],"FPGA":[84],"devices":[85],"implement":[87],"that,":[90],"after":[91],"detecting":[92],"error":[94],"caused":[95],"by":[96,120],"fault,":[98],"can":[99],"adoptively":[100],"reconfigure":[101],"itself":[102],"achieve":[104],"fault":[105],"tolerance.":[106],"FPGAs":[108],"that":[109,125],"are":[110,118],"becoming":[111],"widely":[112],"available":[113],"at":[114],"low":[116],"cost":[117],"exploited":[119],"defining":[121],"model":[124],"allows":[126],"user":[129],"define":[131],"various":[132],"choices,":[136],"providing":[137],"monitoring":[139],"layer":[140],"engineer.":[144]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}