{"id":"https://openalex.org/W1978273975","doi":"https://doi.org/10.1109/icsamos.2009.5289234","title":"&amp;#x201C;Slower than you think&amp;#x201D; &amp;#x2014; The evolution of processor and SoC architectures","display_name":"&amp;#x201C;Slower than you think&amp;#x201D; &amp;#x2014; The evolution of processor and SoC architectures","publication_year":2009,"publication_date":"2009-07-01","ids":{"openalex":"https://openalex.org/W1978273975","doi":"https://doi.org/10.1109/icsamos.2009.5289234","mag":"1978273975"},"language":"en","primary_location":{"id":"doi:10.1109/icsamos.2009.5289234","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icsamos.2009.5289234","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Symposium on Systems, Architectures, Modeling, and Simulation","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086305302","display_name":"Grant Mart\u00edn","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Grant Martin","raw_affiliation_strings":["Tensilica, Inc., Santa Clara, CA, USA"],"affiliations":[{"raw_affiliation_string":"Tensilica, Inc., Santa Clara, CA, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5086305302"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06610755,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"ii","last_page":"ii"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9887999892234802,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9828000068664551,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7527440786361694},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.6377718448638916},{"id":"https://openalex.org/keywords/variety","display_name":"Variety (cybernetics)","score":0.5966509580612183},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5767768621444702},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5586698651313782},{"id":"https://openalex.org/keywords/homogeneous","display_name":"Homogeneous","score":0.5035111308097839},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.47575992345809937},{"id":"https://openalex.org/keywords/perspective","display_name":"Perspective (graphical)","score":0.45729222893714905},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.44657036662101746},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4294905960559845},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3205288052558899},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.17413374781608582},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12606537342071533}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7527440786361694},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6377718448638916},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.5966509580612183},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5767768621444702},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5586698651313782},{"id":"https://openalex.org/C66882249","wikidata":"https://www.wikidata.org/wiki/Q169336","display_name":"Homogeneous","level":2,"score":0.5035111308097839},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.47575992345809937},{"id":"https://openalex.org/C12713177","wikidata":"https://www.wikidata.org/wiki/Q1900281","display_name":"Perspective (graphical)","level":2,"score":0.45729222893714905},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.44657036662101746},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4294905960559845},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3205288052558899},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.17413374781608582},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12606537342071533},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icsamos.2009.5289234","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icsamos.2009.5289234","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Symposium on Systems, Architectures, Modeling, and Simulation","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6200000047683716}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2128523353","https://openalex.org/W1598955744","https://openalex.org/W2291648581","https://openalex.org/W2283291034","https://openalex.org/W2361108168","https://openalex.org/W2371326151","https://openalex.org/W2326041751","https://openalex.org/W3023876411","https://openalex.org/W2084925448","https://openalex.org/W123152114"],"abstract_inverted_index":{"Research":[0],"projects":[1],"talk":[2,14,75],"about":[3,15],"thousands":[4],"of":[5,32,92,110],"processing":[6,21],"elements":[7],"on":[8,78],"an":[9],"SoC.":[10,122],"Various":[11],"commercial":[12],"companies":[13],"their":[16,36,45],"specialised":[17],"homogeneous":[18],"or":[19,51],"heterogeneous":[20],"arrays.":[22],"Graphics":[23],"devices":[24],"are":[25,81,85],"being":[26],"applied":[27],"for":[28,97,131],"solving":[29],"a":[30,49,102],"variety":[31],"computing":[33],"problems":[34],"outside":[35],"design":[37],"domain.":[38],"Finally,":[39],"it":[40],"seems":[41],"that":[42],"everyone,":[43],"and":[44,64,82,94,120],"brother,":[46],"is":[47],"offering":[48],"multicore":[50],"multiprocessor":[52,121],"programming":[53],"model":[54],"to":[55,87],"bring":[56],"all":[57,72],"this":[58],"technology":[59,119],"under":[60],"some":[61,109,127],"control":[62],"-":[63],"if":[65],"we":[66,70,80,84],"don't":[67],"use":[68],"it,":[69],"should":[71],"panic.":[73],"This":[74],"will":[76,107,124],"focus":[77],"where":[79,83],"likely":[86],"go":[88],"with":[89],"the":[90,111],"evolution":[91,132],"processors":[93],"SoC":[95],"architectures":[96],"embedded":[98],"applications.":[99],"Driven":[100],"from":[101],"concrete":[103],"industrial":[104],"perspective,":[105],"I":[106,123],"discuss":[108,126],"progress":[112],"made":[113],"in":[114,117,133],"exploiting":[115],"advances":[116],"processor":[118],"also":[125],"possible":[128],"future":[129],"scenarios":[130],"these":[134],"areas.":[135]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
