{"id":"https://openalex.org/W2168645257","doi":"https://doi.org/10.1109/icsamos.2008.4664846","title":"A light-weight Network-on-Chip architecture for dynamically reconfigurable systems","display_name":"A light-weight Network-on-Chip architecture for dynamically reconfigurable systems","publication_year":2008,"publication_date":"2008-07-01","ids":{"openalex":"https://openalex.org/W2168645257","doi":"https://doi.org/10.1109/icsamos.2008.4664846","mag":"2168645257"},"language":"en","primary_location":{"id":"doi:10.1109/icsamos.2008.4664846","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icsamos.2008.4664846","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051439444","display_name":"Simone Corbetta","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Simone Corbetta","raw_affiliation_strings":["Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062883620","display_name":"Vincenzo Rana","orcid":"https://orcid.org/0000-0001-6851-1737"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Vincenzo Rana","raw_affiliation_strings":["Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010543929","display_name":"Marco D. Santambrogio","orcid":"https://orcid.org/0000-0002-9883-9693"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Domenico Santambrogio","raw_affiliation_strings":["Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014181688","display_name":"Donatella Sciuto","orcid":"https://orcid.org/0000-0001-9030-6940"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Donatella Sciuto","raw_affiliation_strings":["Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Informazione, Politecnico di Milano, Milan, Italy","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I93860229"],"apc_list":null,"apc_paid":null,"fwci":0.7637,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.70245075,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"49","last_page":"56"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9824000000953674,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8530188798904419},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7394738793373108},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6376673579216003},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6012142896652222},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5734840631484985},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5698486566543579},{"id":"https://openalex.org/keywords/communications-system","display_name":"Communications system","score":0.5601173043251038},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5346670746803284},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4609189033508301},{"id":"https://openalex.org/keywords/adaptability","display_name":"Adaptability","score":0.45294755697250366},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4320039749145508},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2463323175907135}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8530188798904419},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7394738793373108},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6376673579216003},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6012142896652222},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5734840631484985},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5698486566543579},{"id":"https://openalex.org/C101765175","wikidata":"https://www.wikidata.org/wiki/Q577764","display_name":"Communications system","level":2,"score":0.5601173043251038},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5346670746803284},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4609189033508301},{"id":"https://openalex.org/C177606310","wikidata":"https://www.wikidata.org/wiki/Q5674297","display_name":"Adaptability","level":2,"score":0.45294755697250366},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4320039749145508},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2463323175907135},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icsamos.2008.4664846","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icsamos.2008.4664846","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation","raw_type":"proceedings-article"},{"id":"pmh:oai:re.public.polimi.it:11311/546627","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/546627","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6299999952316284}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2089155985","https://openalex.org/W2095211124","https://openalex.org/W2117300381","https://openalex.org/W2121856707","https://openalex.org/W2123184444","https://openalex.org/W2151233254","https://openalex.org/W2160642395","https://openalex.org/W2162944278","https://openalex.org/W4205608751"],"related_works":["https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2797161794","https://openalex.org/W2096938998","https://openalex.org/W2340647897","https://openalex.org/W2808484818","https://openalex.org/W1574948540","https://openalex.org/W275424163","https://openalex.org/W2156641820"],"abstract_inverted_index":{"On-chip":[0],"communication":[1,9,45,72,93,105,121,141],"design":[2,41],"is":[3,81,114,123,133],"a":[4,43,48,61,71,102,115],"complex":[5],"task,":[6],"since":[7,77],"the":[8,12,15,21,40,54,57,67,79,88,92,120,127,140],"requirements":[10,94],"and":[11,56,91,100],"complexity":[13],"of":[14,23,42,59,66,70,84],"target":[16],"application":[17],"are":[18,64],"high.":[19],"With":[20],"introduction":[22],"dynamic":[24,137],"reconfiguration":[25,138],"(a":[26],"feature":[27],"than":[28],"can":[29],"be":[30,87],"found,":[31],"for":[32,74,107],"instance,":[33],"in":[34,118],"recent":[35],"Field":[36],"Programmable":[37],"Gate":[38],"Arrays),":[39],"reconfigurable":[44,75,104,109],"infrastructure":[46,73,106],"becomes":[47],"suitable":[49],"approach":[50,113,132],"to":[51,135],"increase":[52],"both":[53],"flexibility":[55],"adaptability":[58],"such":[60],"system.":[62],"These":[63],"two":[65],"key":[68],"features":[69],"systems,":[76],"usually":[78],"designer":[80],"not":[82],"aware":[83],"which":[85,119],"will":[86],"executing":[89],"modules":[90],"at":[95,139],"run-time.":[96],"This":[97],"paper":[98],"introduces":[99],"describes":[101],"novel":[103],"dynamically":[108],"architectures.":[110],"The":[111,130],"proposed":[112,131],"tile-based":[116],"network-on-chip":[117],"layer":[122],"completely":[124],"decoupled":[125],"from":[126],"computational":[128],"one.":[129],"designed":[134],"support":[136],"fabrics":[142],"level.":[143]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
