{"id":"https://openalex.org/W2129853272","doi":"https://doi.org/10.1109/icsamos.2007.4285736","title":"Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform","display_name":"Performance and Power Analysis of Parallelized Implementations on an MPCore Multiprocessor Platform","publication_year":2007,"publication_date":"2007-07-01","ids":{"openalex":"https://openalex.org/W2129853272","doi":"https://doi.org/10.1109/icsamos.2007.4285736","mag":"2129853272"},"language":"en","primary_location":{"id":"doi:10.1109/icsamos.2007.4285736","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icsamos.2007.4285736","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016532646","display_name":"Holger Blume","orcid":"https://orcid.org/0000-0002-0640-6875"},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"H. Blume","raw_affiliation_strings":["Chair for Electrical Engineering and Computer Systems, RWTH Aachen University, Aachen, Germany","RWTH Aachen University, Aachen;"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Electrical Engineering and Computer Systems, RWTH Aachen University, Aachen, Germany","institution_ids":["https://openalex.org/I887968799"]},{"raw_affiliation_string":"RWTH Aachen University, Aachen;","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087639918","display_name":"J. von Livonius","orcid":null},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J. v. Livonius","raw_affiliation_strings":["Chair for Electrical Engineering and Computer Systems, RWTH Aachen University, Aachen, Germany","RWTH Aachen University, Aachen;"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Electrical Engineering and Computer Systems, RWTH Aachen University, Aachen, Germany","institution_ids":["https://openalex.org/I887968799"]},{"raw_affiliation_string":"RWTH Aachen University, Aachen;","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026509256","display_name":"L. Rotenberg","orcid":null},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"L. Rotenberg","raw_affiliation_strings":["Chair for Electrical Engineering and Computer Systems, RWTH Aachen University, Aachen, Germany","RWTH Aachen University, Aachen;"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Electrical Engineering and Computer Systems, RWTH Aachen University, Aachen, Germany","institution_ids":["https://openalex.org/I887968799"]},{"raw_affiliation_string":"RWTH Aachen University, Aachen;","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011494227","display_name":"Thomas Noll","orcid":"https://orcid.org/0000-0002-1865-1798"},"institutions":[{"id":"https://openalex.org/I887968799","display_name":"RWTH Aachen University","ror":"https://ror.org/04xfq0f34","country_code":"DE","type":"education","lineage":["https://openalex.org/I887968799"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"T. G. Noll","raw_affiliation_strings":["Chair for Electrical Engineering and Computer Systems, RWTH Aachen University, Aachen, Germany","RWTH Aachen University, Aachen;"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair for Electrical Engineering and Computer Systems, RWTH Aachen University, Aachen, Germany","institution_ids":["https://openalex.org/I887968799"]},{"raw_affiliation_string":"RWTH Aachen University, Aachen;","institution_ids":["https://openalex.org/I887968799"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086697581","display_name":"H. Bothe","orcid":null},"institutions":[{"id":"https://openalex.org/I4210159457","display_name":"Nokia (Germany)","ror":"https://ror.org/05nh5td39","country_code":"DE","type":"company","lineage":["https://openalex.org/I2738502077","https://openalex.org/I4210159457"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"H. Bothe","raw_affiliation_strings":["Nokia Research Center, Bochum, Germany","[Nokia Research Center, Meesmannstr. 103, 44807 Bochum, Germany. harald.bothe@nokia.com]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nokia Research Center, Bochum, Germany","institution_ids":["https://openalex.org/I4210159457"]},{"raw_affiliation_string":"[Nokia Research Center, Meesmannstr. 103, 44807 Bochum, Germany. harald.bothe@nokia.com]","institution_ids":["https://openalex.org/I4210159457"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111159970","display_name":"J. Brakensiek","orcid":null},"institutions":[{"id":"https://openalex.org/I4210159457","display_name":"Nokia (Germany)","ror":"https://ror.org/05nh5td39","country_code":"DE","type":"company","lineage":["https://openalex.org/I2738502077","https://openalex.org/I4210159457"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J. Brakensiek","raw_affiliation_strings":["Nokia Research Center, Bochum, Germany","Nokia Research Center, Meesmannstr. 103, 44807 Bochum, Germany. jorg.brakensiek@nokia.com"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nokia Research Center, Bochum, Germany","institution_ids":["https://openalex.org/I4210159457"]},{"raw_affiliation_string":"Nokia Research Center, Meesmannstr. 103, 44807 Bochum, Germany. jorg.brakensiek@nokia.com","institution_ids":["https://openalex.org/I4210159457"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6369,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.72831596,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"1","issue":null,"first_page":"74","last_page":"81"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13650","display_name":"Computational Physics and Python Applications","score":0.9919000267982483,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8439282774925232},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.7855133414268494},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6956789493560791},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6552151441574097},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5247048139572144},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.49728015065193176},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4952017366886139},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4446752071380615},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4255903363227844},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41562899947166443},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.4128202497959137},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1753447949886322},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.16300413012504578},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.11380627751350403}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8439282774925232},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.7855133414268494},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6956789493560791},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6552151441574097},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5247048139572144},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.49728015065193176},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4952017366886139},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4446752071380615},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4255903363227844},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41562899947166443},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.4128202497959137},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1753447949886322},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.16300413012504578},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.11380627751350403},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icsamos.2007.4285736","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icsamos.2007.4285736","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation","raw_type":"proceedings-article"},{"id":"pmh:oai:publications.rwth-aachen.de:127389","is_oa":false,"landing_page_url":"https://publications.rwth-aachen.de/search?p=id:%22RWTH-CONV-197607%22","pdf_url":null,"source":{"id":"https://openalex.org/S4306401362","display_name":"RWTH Publications (RWTH Aachen)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I887968799","host_organization_name":"RWTH Aachen University","host_organization_lineage":["https://openalex.org/I887968799"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2007 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation : Samos, Greece, 16 - 19 July 2007 / IEEE<br/>2007 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, Samos, Greece, 2007-07-16 - 2007-07-19","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6200000047683716,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W22487599","https://openalex.org/W76562531","https://openalex.org/W1556859836","https://openalex.org/W1984622938","https://openalex.org/W2030772244","https://openalex.org/W2102625499","https://openalex.org/W2109548381","https://openalex.org/W2161767397","https://openalex.org/W4285719527","https://openalex.org/W6603119836","https://openalex.org/W6683641807"],"related_works":["https://openalex.org/W2120447654","https://openalex.org/W2977179488","https://openalex.org/W2144453115","https://openalex.org/W2128223750","https://openalex.org/W2326041751","https://openalex.org/W1980880153","https://openalex.org/W2025467172","https://openalex.org/W3023876411","https://openalex.org/W2084925448","https://openalex.org/W123152114"],"abstract_inverted_index":{"In":[0,47,91],"this":[1,23,119],"contribution,":[2],"the":[3,51,56,64,76,107,124],"potential":[4,140],"of":[5,11,53,66,106,126,130,141],"parallelized":[6],"software":[7],"that":[8],"implements":[9],"algorithms":[10],"digital":[12,26],"signal":[13,27],"processing":[14,28],"on":[15,33,55,88],"a":[16,34,99,114,128],"multicore":[17],"processor":[18,45],"platform":[19,36],"is":[20],"analyzed.":[21],"For":[22,73],"purpose":[24],"various":[25],"tasks":[29,132],"have":[30,70],"been":[31,71,81,110],"implemented":[32],"prototyping":[35],"i.e.":[37],"an":[38],"ARM":[39,43],"MPCore":[40,108],"featuring":[41],"four":[42],"11":[44],"cores.":[46],"order":[48,92],"to":[49,93],"analyze":[50],"effect":[52],"parallelization":[54,142],"resulting":[57],"performance-power":[58],"ratio,":[59],"influencing":[60],"parameters":[61],"like":[62],"e.g.":[63],"number":[65],"issued":[67],"program":[68],"threads":[69],"studied.":[72],"paralllelization":[74],"issues":[75],"OpenMP":[77,127],"programming":[78],"model":[79,105,121],"has":[80,109],"used":[82],"which":[83,112],"can":[84,146],"be":[85,134,147],"efficiently":[86,135],"applied":[87],"C-":[89],"level.":[90],"elaborate":[94],"power":[95,104,120],"efficient":[96],"code":[97],"also":[98],"functional":[100],"and":[101,122],"instruction":[102],"level":[103],"derived":[111],"features":[113],"high":[115],"estimation":[116],"accuracy.":[117],"Using":[118],"exploiting":[123],"capabilities":[125],"variety":[129],"exemplary":[131],"could":[133],"parallelized.":[136],"The":[137],"general":[138],"efficiency":[139],"for":[143],"multiprocessor":[144],"architectures":[145],"assembled.":[148]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
