{"id":"https://openalex.org/W4243065018","doi":"https://doi.org/10.1109/icpr.2004.1334455","title":"From massively parallel image processors to fault-tolerant nanocomputers","display_name":"From massively parallel image processors to fault-tolerant nanocomputers","publication_year":2004,"publication_date":"2004-01-01","ids":{"openalex":"https://openalex.org/W4243065018","doi":"https://doi.org/10.1109/icpr.2004.1334455"},"language":"en","primary_location":{"id":"doi:10.1109/icpr.2004.1334455","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icpr.2004.1334455","pdf_url":null,"source":{"id":"https://openalex.org/S4363608750","display_name":"Proceedings of the 17th International Conference on Pattern Recognition, 2004. ICPR 2004.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th International Conference on Pattern Recognition, 2004. ICPR 2004.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005550142","display_name":"Jie Han","orcid":"https://orcid.org/0000-0002-8849-4994"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"J. Han","raw_affiliation_strings":["Fac. of Appl. Sci., Delft Univ. of Technol., Netherlands","Quantitative Imaging Group, Faculty of Applied Sciences, Delft University of Technnology, Delft, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fac. of Appl. Sci., Delft Univ. of Technol., Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"Quantitative Imaging Group, Faculty of Applied Sciences, Delft University of Technnology, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009602174","display_name":"Pieter Jonker","orcid":"https://orcid.org/0000-0002-5939-7415"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"P. Jonker","raw_affiliation_strings":["Fac. of Appl. Sci., Delft Univ. of Technol., Netherlands","Quantitative Imaging Group, Faculty of Applied Sciences, Delft University of Technnology, Delft, Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fac. of Appl. Sci., Delft Univ. of Technol., Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"Quantitative Imaging Group, Faculty of Applied Sciences, Delft University of Technnology, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I98358874"],"apc_list":null,"apc_paid":null,"fwci":0.4137,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65929839,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"2","last_page":"7 Vol.3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.789687991142273},{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"Triple modular redundancy","score":0.7293166518211365},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7255937457084656},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.6760004758834839},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6586692333221436},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.6302680969238281},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5435620546340942},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.4436967074871063},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.17061889171600342}],"concepts":[{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.789687991142273},{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.7293166518211365},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7255937457084656},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.6760004758834839},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6586692333221436},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.6302680969238281},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5435620546340942},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.4436967074871063},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.17061889171600342},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icpr.2004.1334455","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icpr.2004.1334455","pdf_url":null,"source":{"id":"https://openalex.org/S4363608750","display_name":"Proceedings of the 17th International Conference on Pattern Recognition, 2004. ICPR 2004.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th International Conference on Pattern Recognition, 2004. ICPR 2004.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W172241961","https://openalex.org/W1539124848","https://openalex.org/W1586749375","https://openalex.org/W1620207222","https://openalex.org/W1833231962","https://openalex.org/W1965020427","https://openalex.org/W1976924286","https://openalex.org/W1985555064","https://openalex.org/W2022829874","https://openalex.org/W2025467801","https://openalex.org/W2049650033","https://openalex.org/W2057465926","https://openalex.org/W2102566596","https://openalex.org/W2119089459","https://openalex.org/W2119147938","https://openalex.org/W2119241866","https://openalex.org/W2124156360","https://openalex.org/W2126194017","https://openalex.org/W2128181612","https://openalex.org/W2138761088","https://openalex.org/W2152641905","https://openalex.org/W2162983760","https://openalex.org/W3182208082","https://openalex.org/W4231340621","https://openalex.org/W4233477625","https://openalex.org/W6607017327","https://openalex.org/W6817927873"],"related_works":["https://openalex.org/W58658798","https://openalex.org/W3114375939","https://openalex.org/W2797678940","https://openalex.org/W3008821054","https://openalex.org/W2255048617","https://openalex.org/W2092102951","https://openalex.org/W1512604874","https://openalex.org/W2759696718","https://openalex.org/W2140636994","https://openalex.org/W1836055744"],"abstract_inverted_index":{"Parallel":[0],"processors":[1],"such":[2],"as":[3],"SIMD":[4,32],"computers":[5],"have":[6,36],"been":[7,37],"successfully":[8],"used":[9,108],"in":[10,62,143,179],"various":[11],"areas":[12],"of":[13,24,43,75,97,137,149,160,189],"high":[14],"performance":[15],"image":[16,90],"and":[17,28,47,101,154,158,193],"data":[18],"processing.":[19],"Due":[20],"to":[21,109,117,126],"their":[22],"characteristics":[23],"highly":[25],"regular":[26],"structures":[27],"mainly":[29],"local":[30],"interconnections,":[31],"or":[33,210],"SIMD-like":[34],"architectures":[35],"proposed":[38,93],"for":[39,59,88,94,166,182,202],"a":[40,55,72,102,138,203],"large-scale":[41],"integration":[42],"recently":[44],"developed":[45],"quantum":[46],"nanoelectronic":[48,211],"devices.":[49,212],"In":[50],"this":[51],"paper,":[52],"we":[53],"present":[54],"fault-tolerant":[56,200],"technique":[57,100,201],"suitable":[58,181],"an":[60,89,150,183,198],"implementation":[61,96,159,184],"nanoelectronics,":[63],"the":[64,95,98,121,135,156,167,175,186],"triplicated":[65],"interwoven":[66,123],"redundancy":[67,78,124],"(TIR).":[68],"The":[69,113],"TIR":[70,99,114,140],"is":[71,92,107,115,132,178],"general":[73,139],"class":[74],"triple":[76],"modular":[77],"(TMR),":[79],"but":[80],"implemented":[81],"with":[82,147],"random":[83],"interconnections.":[84],"A":[85],"prototype":[86],"structure":[87],"processor":[91],"simulation":[103],"based":[104,207],"reliability":[105,136],"model":[106],"investigate":[110],"its":[111],"fault-tolerance.":[112],"extended":[116],"higher":[118,128],"orders,":[119],"namely,":[120],"N-tuple":[122],"(NIR),":[125],"achieve":[127],"system":[129],"reliabilities.":[130],"It":[131],"shown":[133],"that":[134,148,155,174,194],"circuit":[141],"is,":[142],"most":[144],"cases,":[145],"comparable":[146],"equivalent":[151],"TMR":[152],"circuit,":[153],"design":[157],"restorative":[161],"devices":[162],"(voters)":[163],"are":[164],"important":[165],"NIR":[168,176],"(TIR)":[169,177],"structure.":[170],"Our":[171],"study":[172],"indicates":[173],"particular":[180],"by":[185],"manufacturing":[187],"process":[188],"stochastically":[190],"molecular":[191,209],"assembly,":[192],"it":[195],"may":[196],"be":[197],"effective":[199],"massively":[204],"parallel":[205],"architecture":[206],"on":[208]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
