{"id":"https://openalex.org/W2097762163","doi":"https://doi.org/10.1109/icpads.2007.4447713","title":"Loop recreation for thread-level speculation","display_name":"Loop recreation for thread-level speculation","publication_year":2007,"publication_date":"2007-12-01","ids":{"openalex":"https://openalex.org/W2097762163","doi":"https://doi.org/10.1109/icpads.2007.4447713","mag":"2097762163"},"language":"en","primary_location":{"id":"doi:10.1109/icpads.2007.4447713","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icpads.2007.4447713","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Parallel and Distributed Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100629376","display_name":"Lin Gao","orcid":"https://orcid.org/0000-0002-1021-8148"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Lin Gao","raw_affiliation_strings":["University of New South Wales, Australia","New South Wales Univ., Kensington, NSW"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New South Wales, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"New South Wales Univ., Kensington, NSW","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100317802","display_name":"Lian Li","orcid":"https://orcid.org/0000-0002-4476-0541"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Lian Li","raw_affiliation_strings":["University of New South Wales, Australia","New South Wales Univ., Kensington, NSW"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New South Wales, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"New South Wales Univ., Kensington, NSW","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024664385","display_name":"Jingling Xue","orcid":"https://orcid.org/0000-0003-0380-3506"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Jingling Xue","raw_affiliation_strings":["University of New South Wales, Australia","New South Wales Univ., Kensington, NSW"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New South Wales, Australia","institution_ids":["https://openalex.org/I31746571"]},{"raw_affiliation_string":"New South Wales Univ., Kensington, NSW","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013973515","display_name":"Tin\u2010Fook Ngai","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tin-Fook Ngai","raw_affiliation_strings":["Microprocessor Technology Laboratory, Intel","Microprocessor Technology Lab, Intel, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microprocessor Technology Laboratory, Intel","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Microprocessor Technology Lab, Intel, Australia","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2107,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.40847494,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.776802659034729},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.7010725140571594},{"id":"https://openalex.org/keywords/speculative-multithreading","display_name":"Speculative multithreading","score":0.6913551092147827},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6761032342910767},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.5970273017883301},{"id":"https://openalex.org/keywords/for-loop","display_name":"For loop","score":0.5259875655174255},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5186938047409058},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.46572965383529663},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.26323819160461426},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.23738634586334229},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11547210812568665},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.07086241245269775}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.776802659034729},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.7010725140571594},{"id":"https://openalex.org/C15296174","wikidata":"https://www.wikidata.org/wiki/Q7575343","display_name":"Speculative multithreading","level":4,"score":0.6913551092147827},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6761032342910767},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.5970273017883301},{"id":"https://openalex.org/C2779624466","wikidata":"https://www.wikidata.org/wiki/Q838119","display_name":"For loop","level":3,"score":0.5259875655174255},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5186938047409058},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.46572965383529663},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.26323819160461426},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.23738634586334229},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11547210812568665},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.07086241245269775},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/icpads.2007.4447713","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icpads.2007.4447713","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Parallel and Distributed Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.131.3868","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.131.3868","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cse.unsw.edu.au/~jingling/papers/icpads07.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.149.4352","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.149.4352","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cse.unsw.edu.au/~jingling/papers/icpads07.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1869745331","https://openalex.org/W1920053666","https://openalex.org/W1974831646","https://openalex.org/W1976623675","https://openalex.org/W2010220656","https://openalex.org/W2095703459","https://openalex.org/W2110897014","https://openalex.org/W2111905231","https://openalex.org/W2117197583","https://openalex.org/W2122545654","https://openalex.org/W2131498141","https://openalex.org/W2146173591","https://openalex.org/W2155410188","https://openalex.org/W2161943885","https://openalex.org/W2165856991","https://openalex.org/W4231131543","https://openalex.org/W4235388166","https://openalex.org/W4235935136","https://openalex.org/W4241739990","https://openalex.org/W4242484660","https://openalex.org/W4253095404","https://openalex.org/W6639130328","https://openalex.org/W6640197266","https://openalex.org/W6674371507","https://openalex.org/W6684619568"],"related_works":["https://openalex.org/W2023832055","https://openalex.org/W3089467468","https://openalex.org/W2082485924","https://openalex.org/W2105895556","https://openalex.org/W2213849224","https://openalex.org/W1985089255","https://openalex.org/W2115561485","https://openalex.org/W2153202644","https://openalex.org/W2125768521","https://openalex.org/W2010970156"],"abstract_inverted_index":{"For":[0],"some":[1,28],"sequential":[2],"loops,":[3],"existing":[4],"techniques":[5,132],"that":[6,78],"form":[7],"speculative":[8,20,134],"threads":[9],"only":[10],"at":[11,36,90],"their":[12],"loop":[13,54,59,65,111,127],"boundaries":[14],"do":[15],"not":[16],"adequately":[17],"expose":[18],"the":[19,79,83,96,101],"parallelism":[21],"inherent":[22],"in":[23,82,95],"them.":[24],"This":[25,46],"is":[26],"because":[27],"inter-iteration":[29,80],"dependences,":[30],"which":[31],"translate":[32],"into":[33,60],"inter-thread":[34],"dependences":[35,81],"run":[37,91],"time,":[38],"are":[39,85],"too":[40],"costly":[41,87],"to":[42,56,88,115],"synchronize":[43],"or":[44],"speculate.":[45],"paper":[47],"presents":[48],"a":[49,58,61,63,116],"novel":[50],"compiler":[51],"technique,":[52],"called":[53],"recreation,":[55],"transform":[57],"prologue,":[62],"kernel":[64,84],"-":[66],"formed":[67],"with":[68,113,141],"instructions":[69],"from":[70],"two":[71,130],"adjacent":[72],"iterations,":[73],"and":[74,121],"an":[75,105,109],"epilogue":[76],"so":[77],"less":[86],"enforce":[89],"time":[92],"than":[93],"those":[94],"original":[97],"loop.":[98],"We":[99],"prove":[100],"concept":[102],"by":[103,122],"giving":[104],"algorithm":[106],"for":[107,133],"finding":[108],"optimal":[110],"recreation":[112,128],"respect":[114],"simple":[117],"misspeculation":[118],"cost":[119],"model":[120],"demonstrating":[123],"performance":[124],"advantages":[125],"of":[126],"over":[129],"recent":[131],"multi-core":[135],"systems":[136],"running":[137],"four":[138],"irregular":[139],"applications":[140],"indirect":[142],"array":[143],"accesses.":[144]},"counts_by_year":[{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}