{"id":"https://openalex.org/W2072771493","doi":"https://doi.org/10.1109/icnc.2013.6817984","title":"Design of ternary D flip-flop using one latch with neuron-MOS literal circuit","display_name":"Design of ternary D flip-flop using one latch with neuron-MOS literal circuit","publication_year":2013,"publication_date":"2013-07-01","ids":{"openalex":"https://openalex.org/W2072771493","doi":"https://doi.org/10.1109/icnc.2013.6817984","mag":"2072771493"},"language":"en","primary_location":{"id":"doi:10.1109/icnc.2013.6817984","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icnc.2013.6817984","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 Ninth International Conference on Natural Computation (ICNC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100955382","display_name":"Xuanchang Zhou","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xuanchang Zhou","raw_affiliation_strings":["School of Information and Electrical Engineering, Zhejiang University City College, Hangzhou, CHINA","School of Information and Electrical Engineering,Zhejiang University City College,Hangzhou,310015,China)"],"affiliations":[{"raw_affiliation_string":"School of Information and Electrical Engineering, Zhejiang University City College, Hangzhou, CHINA","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"School of Information and Electrical Engineering,Zhejiang University City College,Hangzhou,310015,China)","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012868072","display_name":"Guoqiang Hang","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guoqiang Hang","raw_affiliation_strings":["School of Information and Electrical Engineering, Zhejiang University City College, Hangzhou, CHINA","School of Information and Electrical Engineering,Zhejiang University City College,Hangzhou,310015,China)"],"affiliations":[{"raw_affiliation_string":"School of Information and Electrical Engineering, Zhejiang University City College, Hangzhou, CHINA","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"School of Information and Electrical Engineering,Zhejiang University City College,Hangzhou,310015,China)","institution_ids":["https://openalex.org/I76130692"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5100955382"],"corresponding_institution_ids":["https://openalex.org/I76130692"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.12713386,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"34","issue":null,"first_page":"272","last_page":"276"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/literal","display_name":"Literal (mathematical logic)","score":0.6027529835700989},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.5675572156906128},{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.5464755892753601},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5348540544509888},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5347086191177368},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5126187205314636},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5080482959747314},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4546438455581665},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.42630016803741455},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4114457070827484},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.30083584785461426},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2419847846031189},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.22156429290771484}],"concepts":[{"id":"https://openalex.org/C2780882242","wikidata":"https://www.wikidata.org/wiki/Q14235582","display_name":"Literal (mathematical logic)","level":2,"score":0.6027529835700989},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.5675572156906128},{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.5464755892753601},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5348540544509888},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5347086191177368},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5126187205314636},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5080482959747314},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4546438455581665},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.42630016803741455},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4114457070827484},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.30083584785461426},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2419847846031189},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.22156429290771484},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icnc.2013.6817984","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icnc.2013.6817984","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 Ninth International Conference on Natural Computation (ICNC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1923598886","https://openalex.org/W1988953463","https://openalex.org/W2000774305","https://openalex.org/W2004776020","https://openalex.org/W2025152094","https://openalex.org/W2077841234","https://openalex.org/W2099207424","https://openalex.org/W2129069730","https://openalex.org/W2136100315","https://openalex.org/W2140077188","https://openalex.org/W2144430402","https://openalex.org/W2149388434","https://openalex.org/W2160142098","https://openalex.org/W2164948781","https://openalex.org/W2170392618","https://openalex.org/W2357039114","https://openalex.org/W2544088239","https://openalex.org/W2946132207","https://openalex.org/W6674967778","https://openalex.org/W6679084477","https://openalex.org/W6680189910","https://openalex.org/W7047443233"],"related_works":["https://openalex.org/W2354228963","https://openalex.org/W2353470215","https://openalex.org/W2368065130","https://openalex.org/W2079547420","https://openalex.org/W2375526953","https://openalex.org/W1961477852","https://openalex.org/W2132046218","https://openalex.org/W2783525109","https://openalex.org/W98453623","https://openalex.org/W2340624421"],"abstract_inverted_index":{"A":[0],"new":[1],"ternary":[2,56,69,89,103],"D":[3],"flip-flop":[4,104,159],"using":[5,46,130],"one":[6],"latch":[7],"is":[8],"presented.":[9],"In":[10,36],"order":[11],"to":[12,32,54,67,95,153],"meet":[13],"the":[14,19,24,27,34,37,50,61,64,75,87,96,101,122,140,143,154],"non-transparent":[15],"demand":[16],"in":[17,83,121],"flip-flops,":[18,100],"narrow":[20],"pulses":[21],"produced":[22],"by":[23,45,60,108],"race-hazard":[25],"of":[26,63,142,156],"clock":[28],"signal":[29,57],"are":[30,43,58],"used":[31,53],"control":[33],"latch.":[35],"proposed":[38,88,102,144,147],"design":[39,155],"scheme,":[40],"literal":[41,65,85],"functions":[42],"realized":[44],"neuron-MOS":[47,84],"transistors.":[48],"Then,":[49],"pass":[51,55],"transistors":[52],"controlled":[59],"outputs":[62],"circuit":[66,90],"realize":[68],"inverter":[70],"and":[71],"identity":[72],"cell.":[73],"As":[74],"variable":[76],"threshold":[77],"voltage":[78],"can":[79,105,149],"be":[80,106,150],"achieved":[81],"easily":[82,151],"circuit,":[86],"has":[91],"simple":[92],"structure.":[93],"Compared":[94],"traditional":[97],"voltage-mode":[98,124],"MVL":[99],"fabricated":[107],"standard":[109],"CMOS":[110,135],"process":[111,136],"with":[112,160],"a":[113,161],"double-ploy":[114],"layer,":[115],"without":[116],"multi-level":[117],"ion":[118],"implantation":[119],"applied":[120],"conventional":[123],"multiple-valued":[125,157],"circuits.":[126],"HSPICE":[127],"simulation":[128],"results":[129],"TSMC":[131],"0.35\u03bcm":[132],"double-poly":[133],"4-metal":[134],"parameters":[137],"have":[138],"verified":[139],"characteristics":[141],"scheme.":[145],"The":[146],"construction":[148],"extended":[152],"edge-triggered":[158],"higher":[162],"radix.":[163]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
