{"id":"https://openalex.org/W2037402731","doi":"https://doi.org/10.1109/icmew.2014.6890626","title":"Multi-core based HEVC hardware decoding system","display_name":"Multi-core based HEVC hardware decoding system","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2037402731","doi":"https://doi.org/10.1109/icmew.2014.6890626","mag":"2037402731"},"language":"en","primary_location":{"id":"doi:10.1109/icmew.2014.6890626","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icmew.2014.6890626","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Conference on Multimedia and Expo Workshops (ICMEW)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100724838","display_name":"Hyun-Mi Kim","orcid":"https://orcid.org/0000-0003-4105-7639"},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]},{"id":"https://openalex.org/I88761825","display_name":"Korea University of Science and Technology","ror":"https://ror.org/000qzf213","country_code":"KR","type":"education","lineage":["https://openalex.org/I88761825"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyunmi Kim","raw_affiliation_strings":["Department of Computer Software Engineering, Korea University of Science and Technology, Korea","Multimedia Processor Research Section, Electronics and Telecommunications Research Institute, Daejeon, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Software Engineering, Korea University of Science and Technology, Korea","institution_ids":["https://openalex.org/I88761825"]},{"raw_affiliation_string":"Multimedia Processor Research Section, Electronics and Telecommunications Research Institute, Daejeon, Korea","institution_ids":["https://openalex.org/I142401562"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100737072","display_name":"Seung-Hyun Cho","orcid":"https://orcid.org/0000-0003-1985-4420"},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seunghyun Cho","raw_affiliation_strings":["Multimedia Processor Research Section, Electronics and Telecommunications Research Institute, Daejeon, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Multimedia Processor Research Section, Electronics and Telecommunications Research Institute, Daejeon, Korea","institution_ids":["https://openalex.org/I142401562"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077638735","display_name":"Kyungjin Byun","orcid":"https://orcid.org/0000-0002-5605-8004"},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyungjin Byun","raw_affiliation_strings":["Multimedia Processor Research Section, Electronics and Telecommunications Research Institute, Daejeon, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Multimedia Processor Research Section, Electronics and Telecommunications Research Institute, Daejeon, Korea","institution_ids":["https://openalex.org/I142401562"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085894901","display_name":"Nak-Woong Eum","orcid":null},"institutions":[{"id":"https://openalex.org/I142401562","display_name":"Electronics and Telecommunications Research Institute","ror":"https://ror.org/03ysstz10","country_code":"KR","type":"facility","lineage":["https://openalex.org/I142401562","https://openalex.org/I2801339556","https://openalex.org/I4210144908","https://openalex.org/I4387152098"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Nak-Woong Eum","raw_affiliation_strings":["Multimedia Processor Research Section, Electronics and Telecommunications Research Institute, Daejeon, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Multimedia Processor Research Section, Electronics and Telecommunications Research Institute, Daejeon, Korea","institution_ids":["https://openalex.org/I142401562"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1794,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.78994235,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9940000176429749,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11165","display_name":"Image and Video Quality Assessment","score":0.9876000285148621,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8557206392288208},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7351782321929932},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.695769190788269},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6645870804786682},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5861691832542419},{"id":"https://openalex.org/keywords/video-decoder","display_name":"Video decoder","score":0.5711194276809692},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5273005962371826},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.49241816997528076},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4813412129878998},{"id":"https://openalex.org/keywords/control-unit","display_name":"Control unit","score":0.43233299255371094},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3861285150051117},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.33974698185920715},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2245548963546753}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8557206392288208},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7351782321929932},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.695769190788269},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6645870804786682},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5861691832542419},{"id":"https://openalex.org/C2776580754","wikidata":"https://www.wikidata.org/wiki/Q25098614","display_name":"Video decoder","level":3,"score":0.5711194276809692},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5273005962371826},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.49241816997528076},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4813412129878998},{"id":"https://openalex.org/C81988521","wikidata":"https://www.wikidata.org/wiki/Q676838","display_name":"Control unit","level":2,"score":0.43233299255371094},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3861285150051117},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.33974698185920715},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2245548963546753},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icmew.2014.6890626","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icmew.2014.6890626","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE International Conference on Multimedia and Expo Workshops (ICMEW)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.46000000834465027}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2066320075","https://openalex.org/W2131799300"],"related_works":["https://openalex.org/W2146691588","https://openalex.org/W2391909979","https://openalex.org/W2181785899","https://openalex.org/W3173604304","https://openalex.org/W1814817760","https://openalex.org/W2078233703","https://openalex.org/W2076160492","https://openalex.org/W73200515","https://openalex.org/W2139941121","https://openalex.org/W2296161879"],"abstract_inverted_index":{"In":[0],"this":[1],"demo,":[2],"a":[3,18,36],"scalable":[4,69],"HEVC":[5,88],"hardware":[6],"decoder":[7,50],"is":[8,77],"demonstrated":[9],"for":[10,21,54],"various":[11],"applications":[12],"including":[13],"UHD.":[14],"The":[15,57,75],"architecture":[16,70],"includes":[17],"control":[19],"logic":[20],"multi-core":[22,73],"management":[23],"and":[24],"flexible":[25],"in-loop":[26,38],"filters":[27],"that":[28],"can":[29],"process":[30],"boundaries":[31],"of":[32,66],"picture":[33],"partitions":[34],"without":[35],"separate":[37],"filter":[39],"unit":[40],"from":[41],"the":[42,49,64,67],"pipeline.":[43],"Two-level":[44],"parallel":[45],"processing":[46],"approach":[47],"makes":[48],"operate":[51],"in":[52,89],"real-time":[53],"high-performance":[55],"applications.":[56],"demonstration":[58],"on":[59],"FPGA":[60],"prototype":[61],"board":[62],"shows":[63],"efficiency":[65],"proposed":[68],"achieved":[71],"by":[72,87],"design.":[74],"system":[76],"estimated":[78],"to":[79,82],"be":[80],"able":[81],"decode":[83],"UHD":[84],"video":[85],"coded":[86],"real-time.":[90]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}