{"id":"https://openalex.org/W3011590926","doi":"https://doi.org/10.1109/icm48031.2019.9021861","title":"N-digits Ternary Carry Lookahead Adder Design","display_name":"N-digits Ternary Carry Lookahead Adder Design","publication_year":2019,"publication_date":"2019-12-01","ids":{"openalex":"https://openalex.org/W3011590926","doi":"https://doi.org/10.1109/icm48031.2019.9021861","mag":"3011590926"},"language":"en","primary_location":{"id":"doi:10.1109/icm48031.2019.9021861","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icm48031.2019.9021861","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 31st International Conference on Microelectronics (ICM)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031457386","display_name":"Nancy S. Soliman","orcid":null},"institutions":[{"id":"https://openalex.org/I57629906","display_name":"Nile University","ror":"https://ror.org/03cg7cp61","country_code":"EG","type":"education","lineage":["https://openalex.org/I57629906"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Nancy S. Soliman","raw_affiliation_strings":["Nanoelectronics Integrated Systems Center, Nile University, Cairo, Egypt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanoelectronics Integrated Systems Center, Nile University, Cairo, Egypt","institution_ids":["https://openalex.org/I57629906"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084829415","display_name":"Mohammed E. Fouda","orcid":"https://orcid.org/0000-0001-7139-3428"},"institutions":[{"id":"https://openalex.org/I204250578","display_name":"University of California, Irvine","ror":"https://ror.org/04gyf1771","country_code":"US","type":"education","lineage":["https://openalex.org/I204250578"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohammed E. Fouda","raw_affiliation_strings":["Electrical Engineering and Computer Science Dept., University of California, Irvine, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical Engineering and Computer Science Dept., University of California, Irvine, CA, USA","institution_ids":["https://openalex.org/I204250578"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083130551","display_name":"Lobna A. Said","orcid":"https://orcid.org/0000-0001-8223-4625"},"institutions":[{"id":"https://openalex.org/I57629906","display_name":"Nile University","ror":"https://ror.org/03cg7cp61","country_code":"EG","type":"education","lineage":["https://openalex.org/I57629906"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Lobna A. Said","raw_affiliation_strings":["Nanoelectronics Integrated Systems Center, Nile University, Cairo, Egypt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanoelectronics Integrated Systems Center, Nile University, Cairo, Egypt","institution_ids":["https://openalex.org/I57629906"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035566088","display_name":"Ahmed H. Madian","orcid":"https://orcid.org/0000-0001-8313-8088"},"institutions":[{"id":"https://openalex.org/I3089115","display_name":"Egyptian Atomic Energy Authority","ror":"https://ror.org/04hd0yz67","country_code":"EG","type":"government","lineage":["https://openalex.org/I3089115"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Ahmed H. Madian","raw_affiliation_strings":["Radiation Engineering Dept., NCRRT, Egyptian Atomic Energy Authority, Egypt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Radiation Engineering Dept., NCRRT, Egyptian Atomic Energy Authority, Egypt","institution_ids":["https://openalex.org/I3089115"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102869443","display_name":"Ahmed G. Radwan","orcid":"https://orcid.org/0000-0001-6079-4138"},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Ahmed G. Radwan","raw_affiliation_strings":["Engineering Mathematics and Physics Department, Faculty of Engineering, Cairo University, Giza, Egypt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Engineering Mathematics and Physics Department, Faculty of Engineering, Cairo University, Giza, Egypt","institution_ids":["https://openalex.org/I145487455"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7265,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.73144405,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"142","last_page":"145"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.8998659253120422},{"id":"https://openalex.org/keywords/carry","display_name":"Carry (investment)","score":0.7773297429084778},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.7356071472167969},{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.6036845445632935},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.592134416103363},{"id":"https://openalex.org/keywords/realization","display_name":"Realization (probability)","score":0.5639743804931641},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5520645380020142},{"id":"https://openalex.org/keywords/carry-save-adder","display_name":"Carry-save adder","score":0.5309317111968994},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.521148681640625},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4971525967121124},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4967256188392639},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.48191073536872864},{"id":"https://openalex.org/keywords/serial-binary-adder","display_name":"Serial binary adder","score":0.43657466769218445},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.42282065749168396},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42235201597213745},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.4216664731502533},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40735551714897156},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.34236323833465576},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3358476161956787},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2955189347267151},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.2206035554409027},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17075487971305847},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16712158918380737}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.8998659253120422},{"id":"https://openalex.org/C2776299755","wikidata":"https://www.wikidata.org/wiki/Q432449","display_name":"Carry (investment)","level":2,"score":0.7773297429084778},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.7356071472167969},{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.6036845445632935},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.592134416103363},{"id":"https://openalex.org/C2781089630","wikidata":"https://www.wikidata.org/wiki/Q21856745","display_name":"Realization (probability)","level":2,"score":0.5639743804931641},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5520645380020142},{"id":"https://openalex.org/C3227080","wikidata":"https://www.wikidata.org/wiki/Q5046770","display_name":"Carry-save adder","level":4,"score":0.5309317111968994},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.521148681640625},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4971525967121124},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4967256188392639},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.48191073536872864},{"id":"https://openalex.org/C116206932","wikidata":"https://www.wikidata.org/wiki/Q7454686","display_name":"Serial binary adder","level":4,"score":0.43657466769218445},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.42282065749168396},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42235201597213745},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4216664731502533},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40735551714897156},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.34236323833465576},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3358476161956787},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2955189347267151},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.2206035554409027},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17075487971305847},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16712158918380737},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icm48031.2019.9021861","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icm48031.2019.9021861","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 31st International Conference on Microelectronics (ICM)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W94978493","https://openalex.org/W1578783943","https://openalex.org/W1730001569","https://openalex.org/W1964973855","https://openalex.org/W1994877964","https://openalex.org/W2035200600","https://openalex.org/W2036850929","https://openalex.org/W2041006875","https://openalex.org/W2071069174","https://openalex.org/W2123819993","https://openalex.org/W2124296721","https://openalex.org/W2327340476","https://openalex.org/W2342387592","https://openalex.org/W2493028547","https://openalex.org/W2752061190","https://openalex.org/W2754632097","https://openalex.org/W2781760381","https://openalex.org/W2937382037","https://openalex.org/W2943019196","https://openalex.org/W4214771512"],"related_works":["https://openalex.org/W3166220017","https://openalex.org/W4390693432","https://openalex.org/W2559769120","https://openalex.org/W2329434788","https://openalex.org/W4206995395","https://openalex.org/W2183648978","https://openalex.org/W2163456301","https://openalex.org/W2897293593","https://openalex.org/W1584617340","https://openalex.org/W2997250644"],"abstract_inverted_index":{"Carry":[0],"lookahead":[1],"adders":[2],"(CLAs)":[3],"are":[4,46,74,125],"extensively":[5],"used":[6],"in":[7,23,48,76,95,115],"digital":[8],"circuits":[9],"due":[10],"to":[11,19,50,128],"their":[12,51],"logarithmic":[13],"computational":[14,21],"time":[15],"(O(log":[16],"n))":[17],"compared":[18],"linear":[20],"time(O(n))":[22],"the":[24,71,79,82,88,92,96,101,113,116,122],"ripple":[25],"carry":[26],"adders.":[27],"In":[28],"this":[29],"paper,":[30],"two":[31],"design":[32,98],"approaches":[33],"for":[34],"N-digits":[35],"ternary":[36,62,133],"logic":[37,44,118],"CLA":[38,63],"based":[39,106],"on":[40,107],"K-map":[41,97],"and":[42,56,68,81,103,109],"threshold":[43,117],"methods":[45],"proposed":[47,72,123],"addition":[49],"realization":[52],"using":[53],"CNTFETs":[54],"only":[55],"memristor":[57,102,108],"with":[58],"CNTFETs.":[59],"Finally,":[60],"4-bit":[61],"is":[64,91,112],"presented.":[65],"A":[66],"comparison":[67,85],"tradeoffs":[69],"among":[70],"designs":[73,124],"presented":[75],"terms":[77],"of":[78],"delay":[80],"area.":[83],"The":[84],"shows":[86],"that":[87],"transistor-only-based":[89],"implementation":[90,105],"best":[93,114],"choice":[94],"approach.":[99],"However,":[100],"transistor-based":[104],"transistors":[110],"integration":[111],"(TL)":[119],"design.":[120],"Therefore,":[121],"very":[126],"promising":[127],"build":[129],"high":[130],"performance":[131],"full":[132],"ALU":[134],"unit.":[135]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}