{"id":"https://openalex.org/W2027423831","doi":"https://doi.org/10.1109/icitcs.2013.6717785","title":"A Space Effective DRAM Adapter for PRAM-Based Main Memory System","display_name":"A Space Effective DRAM Adapter for PRAM-Based Main Memory System","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2027423831","doi":"https://doi.org/10.1109/icitcs.2013.6717785","mag":"2027423831"},"language":"en","primary_location":{"id":"doi:10.1109/icitcs.2013.6717785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icitcs.2013.6717785","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on IT Convergence and Security (ICITCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042991167","display_name":"Do-Heon Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Do-Heon Lee","raw_affiliation_strings":["Department of Computer Science, Yonsei University, Seoul, Korea","[Dept. of Computer Science, Yonsei University, Seoul, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"[Dept. of Computer Science, Yonsei University, Seoul, South Korea]","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003605746","display_name":"Su-Kyoung Yoon","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Su-Kyoung Yoon","raw_affiliation_strings":["Department of Computer Science, Yonsei University, Seoul, Korea","[Dept. of Computer Science, Yonsei University, Seoul, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"[Dept. of Computer Science, Yonsei University, Seoul, South Korea]","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039059145","display_name":"Cheong-Gil Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Cheong-Gil Kim","raw_affiliation_strings":["Department of Computer Science, Yonsei University, Seoul, Korea","[Dept. of Computer Science, Yonsei University, Seoul, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"[Dept. of Computer Science, Yonsei University, Seoul, South Korea]","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032646530","display_name":"Shin\u2010Dug Kim","orcid":"https://orcid.org/0000-0002-2642-6662"},"institutions":[{"id":"https://openalex.org/I129672417","display_name":"Namseoul University","ror":"https://ror.org/0509ndt57","country_code":"KR","type":"education","lineage":["https://openalex.org/I129672417"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Shin-Dug Kim","raw_affiliation_strings":["Department of Computer Science, Namseoul University, Chungcheongbuk-do, Korea","[Department of Computer Science, Namseoul University, Cheonan, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Namseoul University, Chungcheongbuk-do, Korea","institution_ids":["https://openalex.org/I129672417"]},{"raw_affiliation_string":"[Department of Computer Science, Namseoul University, Cheonan, South Korea]","institution_ids":["https://openalex.org/I129672417"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021124164","display_name":"Jung-Geun Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jung-Geun Kim","raw_affiliation_strings":["Department of Computer Science, Yonsei University, Seoul, Korea","[Dept. of Computer Science, Yonsei University, Seoul, South Korea]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Yonsei University, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"[Dept. of Computer Science, Yonsei University, Seoul, South Korea]","institution_ids":["https://openalex.org/I193775966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3172,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.60213572,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"40","issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8232309818267822},{"id":"https://openalex.org/keywords/adapter","display_name":"Adapter (computing)","score":0.7905255556106567},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.7850806713104248},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.7391930222511292},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.6983013153076172},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.5717341303825378},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5628397464752197},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.5084577798843384},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.48836204409599304},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.4833361804485321},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.48180335760116577},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.4528542160987854},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44698405265808105},{"id":"https://openalex.org/keywords/conventional-memory","display_name":"Conventional memory","score":0.44527536630630493},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.44216081500053406},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.4324228763580322},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4299972951412201},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.38759368658065796},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.3238096833229065}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8232309818267822},{"id":"https://openalex.org/C177284502","wikidata":"https://www.wikidata.org/wiki/Q1005390","display_name":"Adapter (computing)","level":2,"score":0.7905255556106567},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.7850806713104248},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.7391930222511292},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.6983013153076172},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.5717341303825378},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5628397464752197},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.5084577798843384},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.48836204409599304},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.4833361804485321},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.48180335760116577},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.4528542160987854},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44698405265808105},{"id":"https://openalex.org/C53838383","wikidata":"https://www.wikidata.org/wiki/Q541148","display_name":"Conventional memory","level":5,"score":0.44527536630630493},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.44216081500053406},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.4324228763580322},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4299972951412201},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.38759368658065796},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3238096833229065},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icitcs.2013.6717785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icitcs.2013.6717785","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on IT Convergence and Security (ICITCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1964363228","https://openalex.org/W2016839924","https://openalex.org/W2048588974","https://openalex.org/W2096798533","https://openalex.org/W2099798359","https://openalex.org/W2105620424","https://openalex.org/W2147539449","https://openalex.org/W2394539233","https://openalex.org/W4230076341","https://openalex.org/W4244361616","https://openalex.org/W6675639869","https://openalex.org/W6712304592"],"related_works":["https://openalex.org/W3008068282","https://openalex.org/W2065759842","https://openalex.org/W2896161911","https://openalex.org/W2019238062","https://openalex.org/W4289383899","https://openalex.org/W2951921863","https://openalex.org/W1707075782","https://openalex.org/W2148966412","https://openalex.org/W2138825797","https://openalex.org/W4243618206"],"abstract_inverted_index":{"As":[0],"new":[1,23,33],"non-volatile":[2,24],"memories":[3],"are":[4],"emerging,":[5],"it":[6],"is":[7,29,122],"the":[8,13,19,39,63,137,143,162,179],"right":[9],"time":[10],"to":[11,30,47,102,177],"re-evaluate":[12],"conventional":[14,50,56],"memory":[15,25,36,65,68,72,92,165,172,183],"hierarchy":[16],"by":[17,124,146,155],"considering":[18],"potential":[20],"of":[21,41,49,98,106,116,153],"utilizing":[22],"components.":[26],"This":[27],"research":[28],"design":[31],"a":[32,83,125],"PRAM-based":[34,163],"main":[35,52,64,91,164,182],"structure,":[37],"supporting":[38],"advantages":[40],"PRAM":[42,89,154],"while":[43],"providing":[44],"performance":[45],"similar":[46],"that":[48,136],"DRAM":[51,86,95,139],"memory.":[53],"To":[54],"replace":[55,178],"DRAMs":[57],"with":[58,161],"non-":[59],"volatile":[60],"PRAMs":[61],"as":[62],"components,":[66],"comparable":[67],"access":[69,144],"latency":[70,145],"and":[71,109,149],"cell":[73],"endurance":[74],"should":[75],"be":[76,175],"supported.":[77],"For":[78],"these":[79],"goals,":[80],"we":[81],"propose":[82],"space":[84],"effective":[85],"adapter":[87,96,140],"for":[88,113],"based":[90],"system.":[93,184],"The":[94,119],"consists":[97],"two":[99,110],"page-block":[100],"buffers":[101,112],"assure":[103],"better":[104,114],"use":[105,115],"spatial":[107],"locality":[108],"filtering":[111],"temporal":[117],"locality.":[118],"proposed":[120,138,171],"structure":[121],"evaluated":[123],"trace-driven":[126],"simulator":[127],"using":[128],"SPEC":[129],"CPU":[130],"2006":[131],"traces.":[132],"Experimental":[133],"results":[134],"show":[135],"can":[141,150,174],"reduce":[142],"around":[147,156],"60%":[148],"increase":[151],"lifetime":[152],"20":[157],"times":[158],"in":[159],"comparison":[160],"without":[166],"any":[167],"adapter.":[168],"Thus,":[169],"our":[170],"architecture":[173],"used":[176],"current":[180],"DRAM-based":[181]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
