{"id":"https://openalex.org/W1987531209","doi":"https://doi.org/10.1109/icip.2007.4379200","title":"Architecture for Analog Variable Block-Size Motion Estimation","display_name":"Architecture for Analog Variable Block-Size Motion Estimation","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W1987531209","doi":"https://doi.org/10.1109/icip.2007.4379200","mag":"1987531209"},"language":"en","primary_location":{"id":"doi:10.1109/icip.2007.4379200","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icip.2007.4379200","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Conference on Image Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065136207","display_name":"Lauri Koskinen","orcid":"https://orcid.org/0009-0009-3737-3912"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Lauri Koskinen","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland","Helsinki Univ. of Technol, Helsinki"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland","institution_ids":[]},{"raw_affiliation_string":"Helsinki Univ. of Technol, Helsinki","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010469494","display_name":"Joona Marku","orcid":null},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Joona Marku","raw_affiliation_strings":["Department of Information Technology, Microelectronics Laboratory, University of Turku, Finland","University of Turku, Department of Information Technology, Microelectronics Laboratory"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, Microelectronics Laboratory, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"University of Turku, Department of Information Technology, Microelectronics Laboratory","institution_ids":["https://openalex.org/I155660961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038944203","display_name":"A. Paasio","orcid":"https://orcid.org/0000-0003-2543-7391"},"institutions":[{"id":"https://openalex.org/I155660961","display_name":"University of Turku","ror":"https://ror.org/05vghhr25","country_code":"FI","type":"education","lineage":["https://openalex.org/I155660961"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"Ari Paasio","raw_affiliation_strings":["Department of Information Technology, Microelectronics Laboratory, University of Turku, Finland","University of Turku, Department of Information Technology, Microelectronics Laboratory"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Technology, Microelectronics Laboratory, University of Turku, Finland","institution_ids":["https://openalex.org/I155660961"]},{"raw_affiliation_string":"University of Turku, Department of Information Technology, Microelectronics Laboratory","institution_ids":["https://openalex.org/I155660961"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066316803","display_name":"K. Halonen","orcid":"https://orcid.org/0000-0002-4385-9689"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kari Halonen","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland","Electronic Circuit Design Laboratory, Helsinki University of Technology, P.O.Box 3000, 02015 TKK, Finland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland","institution_ids":[]},{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, P.O.Box 3000, 02015 TKK, Finland","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.0785,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.77361937,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"5","issue":null,"first_page":"II ","last_page":" 493"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/motion-estimation","display_name":"Motion estimation","score":0.7450512647628784},{"id":"https://openalex.org/keywords/block-size","display_name":"Block size","score":0.6894581317901611},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.6841782927513123},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6549128293991089},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5205415487289429},{"id":"https://openalex.org/keywords/quarter-pixel-motion","display_name":"Quarter-pixel motion","score":0.49861645698547363},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39785754680633545},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.31948184967041016},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1659984588623047},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15969645977020264},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1543310582637787}],"concepts":[{"id":"https://openalex.org/C10161872","wikidata":"https://www.wikidata.org/wiki/Q557891","display_name":"Motion estimation","level":2,"score":0.7450512647628784},{"id":"https://openalex.org/C41431624","wikidata":"https://www.wikidata.org/wiki/Q1053357","display_name":"Block size","level":3,"score":0.6894581317901611},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.6841782927513123},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6549128293991089},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5205415487289429},{"id":"https://openalex.org/C174493125","wikidata":"https://www.wikidata.org/wiki/Q1073461","display_name":"Quarter-pixel motion","level":3,"score":0.49861645698547363},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39785754680633545},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.31948184967041016},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1659984588623047},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15969645977020264},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1543310582637787},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icip.2007.4379200","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icip.2007.4379200","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Conference on Image Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1489791818","https://openalex.org/W1513469622","https://openalex.org/W1532611412","https://openalex.org/W1823480186","https://openalex.org/W1832082533","https://openalex.org/W1941304374","https://openalex.org/W1983976715","https://openalex.org/W2046112001","https://openalex.org/W2097988027","https://openalex.org/W2100836723","https://openalex.org/W2130416988","https://openalex.org/W2131862714","https://openalex.org/W2140823559","https://openalex.org/W6630760390"],"related_works":["https://openalex.org/W2049273678","https://openalex.org/W2168622369","https://openalex.org/W1563772308","https://openalex.org/W2030267314","https://openalex.org/W2223442884","https://openalex.org/W2162884882","https://openalex.org/W2227202045","https://openalex.org/W1991150677","https://openalex.org/W2533886715","https://openalex.org/W2149862911"],"abstract_inverted_index":{"A":[0],"variable":[1],"block-size":[2,130],"analog":[3,12,102,111],"motion":[4,13,54,103],"estimation":[5,14,55,104],"architecture":[6,49],"is":[7,15,30,50,100,107],"presented.":[8],"The":[9,27,48],"advantage":[10],"of":[11,52,58],"that":[16,124],"it":[17],"can":[18,120,127],"be":[19,121],"realized":[20],"in":[21,65],"connection":[22],"with":[23,42,56,81],"a":[24,74,77,101,129],"sensor":[25],"array.":[26],"reference":[28],"data":[29],"stored":[31],"within":[32],"the":[33,38,59,94,125,133],"processing":[34],"array,":[35],"and":[36],"thus":[37],"memory":[39],"transfers":[40],"associated":[41],"digital":[43],"realizations":[44],"are":[45],"not":[46],"required.":[47],"capable":[51],"performing":[53],"all":[57],"seven":[60],"different":[61],"block":[62,96],"sizes":[63],"used":[64],"state-of-the-art":[66],"video":[67],"standards,":[68],"such":[69],"as":[70],"H.264.":[71],"By":[72],"using":[73],"deep-submicron":[75],"process,":[76],"novel":[78],"interconnect":[79,90],"strategy":[80,91],"30":[82],"connections":[83],"per":[84],"cell":[85,105],"has":[86],"been":[87],"developed.":[88],"This":[89],"enables":[92],"connecting":[93],"various":[95],"sizes.":[97],"Also":[98],"introduced":[99],"which":[106],"more":[108],"robust":[109],"against":[110],"inaccuracies":[112],"than":[113],"previous":[114],"implementations.":[115],"Further,":[116],"additional":[117],"computational":[118],"elements":[119],"added":[122],"so":[123],"array":[126],"determine":[128],"partition":[131],"without":[132],"need":[134],"for":[135],"an":[136],"initial":[137],"search":[138],"or":[139],"Lagrange":[140],"estimation.":[141]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}