{"id":"https://openalex.org/W2783602616","doi":"https://doi.org/10.1109/iciinfs.2016.8262968","title":"A low power and high speed 10 transistor full adder using multi threshold technique","display_name":"A low power and high speed 10 transistor full adder using multi threshold technique","publication_year":2016,"publication_date":"2016-12-01","ids":{"openalex":"https://openalex.org/W2783602616","doi":"https://doi.org/10.1109/iciinfs.2016.8262968","mag":"2783602616"},"language":"en","primary_location":{"id":"doi:10.1109/iciinfs.2016.8262968","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iciinfs.2016.8262968","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004063985","display_name":"Akshay Bhaskar","orcid":null},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Akshay Bhaskar","raw_affiliation_strings":["School of Electronics Engineering, VIT University, Vellore, Tamil Nadu, India"],"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, VIT University, Vellore, Tamil Nadu, India","institution_ids":["https://openalex.org/I876193797"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5098343147","display_name":"Reddy Dheeraj","orcid":null},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Reddy Dheeraj","raw_affiliation_strings":["School of Electronics Engineering, VIT University, Vellore, Tamil Nadu, India"],"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, VIT University, Vellore, Tamil Nadu, India","institution_ids":["https://openalex.org/I876193797"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100696802","display_name":"S. Saravanan","orcid":null},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shabhari Saravanan","raw_affiliation_strings":["School of Electronics Engineering, VIT University, Vellore, Tamil Nadu, India"],"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, VIT University, Vellore, Tamil Nadu, India","institution_ids":["https://openalex.org/I876193797"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011188832","display_name":"K. Jagannadha Naidu","orcid":"https://orcid.org/0000-0002-6063-887X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"K. Jagannadha Naidu","raw_affiliation_strings":["VIT University, Vellore, Tamil Nadu, IN"],"affiliations":[{"raw_affiliation_string":"VIT University, Vellore, Tamil Nadu, IN","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5004063985"],"corresponding_institution_ids":["https://openalex.org/I876193797"],"apc_list":null,"apc_paid":null,"fwci":0.1838,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.6240462,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"371","last_page":"374"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9335424304008484},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.740192711353302},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.6371721029281616},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6111129522323608},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.586580216884613},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5702922940254211},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.5128524303436279},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4939783215522766},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.4727816581726074},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4484376013278961},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.43044915795326233},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.271347314119339},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2507905662059784},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1271795630455017}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9335424304008484},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.740192711353302},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.6371721029281616},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6111129522323608},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.586580216884613},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5702922940254211},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.5128524303436279},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4939783215522766},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.4727816581726074},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4484376013278961},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.43044915795326233},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.271347314119339},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2507905662059784},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1271795630455017},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iciinfs.2016.8262968","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iciinfs.2016.8262968","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 11th International Conference on Industrial and Information Systems (ICIIS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8799999952316284}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1842156172","https://openalex.org/W2007043968","https://openalex.org/W2032823836","https://openalex.org/W2035779447","https://openalex.org/W2036232133","https://openalex.org/W2119985366","https://openalex.org/W2159229333","https://openalex.org/W2185367461","https://openalex.org/W2277096476","https://openalex.org/W6638957527"],"related_works":["https://openalex.org/W2527731084","https://openalex.org/W2619307913","https://openalex.org/W2622611104","https://openalex.org/W4200276208","https://openalex.org/W2339546864","https://openalex.org/W3127415269","https://openalex.org/W2184864716","https://openalex.org/W2025146138","https://openalex.org/W1882870471","https://openalex.org/W3015580345"],"abstract_inverted_index":{"An":[0],"adder":[1,58,94],"is":[2,32,40,59,118],"one":[3],"of":[4,38,142],"the":[5,30,45,75,106,112,133],"main":[6],"components":[7],"in":[8,24,61],"many":[9],"digital":[10],"devices,":[11],"DSP":[12],"processors,":[13],"etc.":[14],"Leakage":[15],"power":[16,47,55,116],"reduction":[17],"and":[18,70,95,122],"area":[19,134],"have":[20],"become":[21],"important":[22],"factors":[23],"designing":[25],"recent":[26],"VLSI":[27],"circuits.":[28],"As":[29],"technology":[31],"constantly":[33],"scaling":[34],"down,":[35],"threshold":[36],"voltage":[37],"transistors":[39],"also":[41],"reduced,":[42],"thereby":[43],"making":[44],"static":[46],"dissipation":[48,69,117],"high.":[49],"In":[50],"this":[51],"paper":[52],"a":[53],"low":[54],"10T":[56],"full":[57,79,84,93,102,110],"designed":[60],"45":[62],"nm":[63],"complementary":[64],"pass":[65],"transistor":[66,78,83,92,101,109],"technology.":[67],"Power":[68,123],"delay":[71],"are":[72],"compared":[73],"with":[74,139],"conventional":[76,107],"28":[77,91,108],"adder,":[80,85,111],"proposed":[81,96,113,130],"10":[82,100],"Multi":[86,97],"Threshold":[87,98],"CMOS":[88],"(MTCMOS)":[89],"based":[90,99],"adder.":[103],"Compared":[104],"to":[105],"design":[114],"shows":[115],"reduced":[119],"by":[120,127,136],"99.528%":[121],"Delay":[124],"Product":[125],"(PDP)":[126],"99.913%.":[128],"The":[129],"circuit":[131],"reduces":[132],"used":[135],"64%":[137],"accompanied":[138],"high":[140],"speed":[141],"operation.":[143]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}