{"id":"https://openalex.org/W1992890411","doi":"https://doi.org/10.1109/icicdt.2013.6563320","title":"Biosequences analysis on NanoMagnet Logic","display_name":"Biosequences analysis on NanoMagnet Logic","publication_year":2013,"publication_date":"2013-05-01","ids":{"openalex":"https://openalex.org/W1992890411","doi":"https://doi.org/10.1109/icicdt.2013.6563320","mag":"1992890411"},"language":"en","primary_location":{"id":"doi:10.1109/icicdt.2013.6563320","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icicdt.2013.6563320","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 2013 International Conference on IC Design & Technology (ICICDT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://porto.polito.it/2511684/","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080495091","display_name":"J. Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"J. Wang","raw_affiliation_strings":["Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012025330","display_name":"Marco Vacca","orcid":"https://orcid.org/0000-0003-2920-3357"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Vacca","raw_affiliation_strings":["Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036441962","display_name":"Mariagrazia Graziano","orcid":"https://orcid.org/0000-0002-8721-9990"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Graziano","raw_affiliation_strings":["Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":null,"display_name":"M RuoRoch","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M RuoRoch","raw_affiliation_strings":["Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077512098","display_name":"Maurizio Zamboni","orcid":"https://orcid.org/0000-0001-8179-5973"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M. Zamboni","raw_affiliation_strings":["Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Dipt. di Elettron. e Telecomun., Politec. di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5080495091"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":5.1827,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.95544382,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"7","issue":null,"first_page":"131","last_page":"134"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12162","display_name":"Cellular Automata and Applications","score":0.9887999892234802,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9829000234603882,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7220550775527954},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7139984369277954},{"id":"https://openalex.org/keywords/nanomagnet","display_name":"Nanomagnet","score":0.5947997570037842},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5509117245674133},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5168009996414185},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4996039867401123},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4677189886569977},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.463558554649353},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.43847334384918213},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.42636895179748535},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.4196591079235077},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4175361096858978},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.33199140429496765},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.31905901432037354},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.265384316444397},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21559596061706543},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11218860745429993},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10448107123374939}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7220550775527954},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7139984369277954},{"id":"https://openalex.org/C131872197","wikidata":"https://www.wikidata.org/wiki/Q3870157","display_name":"Nanomagnet","level":4,"score":0.5947997570037842},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5509117245674133},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5168009996414185},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4996039867401123},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4677189886569977},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.463558554649353},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.43847334384918213},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.42636895179748535},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.4196591079235077},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4175361096858978},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.33199140429496765},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.31905901432037354},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.265384316444397},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21559596061706543},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11218860745429993},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10448107123374939},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C115260700","wikidata":"https://www.wikidata.org/wiki/Q11408","display_name":"Magnetic field","level":2,"score":0.0},{"id":"https://openalex.org/C32546565","wikidata":"https://www.wikidata.org/wiki/Q856711","display_name":"Magnetization","level":3,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icicdt.2013.6563320","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icicdt.2013.6563320","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of 2013 International Conference on IC Design & Technology (ICICDT)","raw_type":"proceedings-article"},{"id":"pmh:oai:porto.polito.it:2511684","is_oa":true,"landing_page_url":"http://porto.polito.it/2511684/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:porto.polito.it:2511684","is_oa":true,"landing_page_url":"http://porto.polito.it/2511684/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8199999928474426,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1976924286","https://openalex.org/W1985450948","https://openalex.org/W1994910407","https://openalex.org/W2017857945","https://openalex.org/W2018334481","https://openalex.org/W2027152886","https://openalex.org/W2028294129","https://openalex.org/W2037906217","https://openalex.org/W2040703528","https://openalex.org/W2049176002","https://openalex.org/W2087064593","https://openalex.org/W2092978386","https://openalex.org/W2107979398","https://openalex.org/W2125802779","https://openalex.org/W2167610579"],"related_works":["https://openalex.org/W2320531805","https://openalex.org/W4200627911","https://openalex.org/W1971684003","https://openalex.org/W1968180507","https://openalex.org/W2308186793","https://openalex.org/W2115658098","https://openalex.org/W2137740905","https://openalex.org/W1555025092","https://openalex.org/W2332122163","https://openalex.org/W2363829830"],"abstract_inverted_index":{"In":[0],"the":[1,13,17,44,52,55,61,133,139,147,150,163,167,190],"last":[2],"decade":[3],"Quantum":[4],"dot":[5],"Cellular":[6],"Automata":[7],"technology":[8,122,144,188],"has":[9],"been":[10],"one":[11],"of":[12,39,123,149,170,179],"most":[14],"studied":[15],"among":[16],"emerging":[18],"technologies.":[19],"The":[20,36,130,152],"magnetic":[21],"implementation,":[22],"NanoMagnet":[23],"Logic":[24],"(NML),":[25],"is":[26,73,90,138,154,215],"particularly":[27],"interesting":[28],"as":[29],"an":[30,117,124],"alternative":[31],"solutions":[32],"to":[33,46,64,85,92,146,161],"CMOS":[34,77],"technology.":[35,101],"main":[37],"advantages":[38],"NML":[40,68,121,187,213],"circuits":[41,71],"resides":[42],"in":[43,51,105,112,177,199],"possibility":[45],"mix":[47],"logic":[48,214],"and":[49,60,66,69,88,172,181,208],"memory":[50],"same":[53],"device,":[54],"expected":[56],"low":[57],"power":[58,182,200],"consumption":[59,201],"remarkable":[62],"tolerance":[63],"heat":[65],"radiations.":[67],"QCA":[70],"behavior":[72],"different":[74],"w.r.t.":[75],"their":[76,86],"counterparts.":[78],"Consequently":[79],"architecture":[80,131],"organization":[81,141],"must":[82],"be":[83],"tailored":[84],"characteristics,":[87],"it":[89],"important":[91],"identify":[93],"which":[94,137],"applications":[95],"are":[96,174],"best":[97,140],"suited":[98,217],"for":[99,127,142,218],"this":[100,106,113,143],"Our":[102],"contribution":[103],"reported":[104],"paper":[107],"represents":[108],"a":[109,157,196],"considerable":[110,197],"step-forward":[111],"direction.":[114],"We":[115],"present":[116],"optimized":[118],"implementation":[119],"on":[120],"hardware":[125],"accelerator":[126],"biosequences":[128],"analysis.":[129],"leverages":[132],"systolic":[134],"array":[135],"structure,":[136],"due":[145],"regularity":[148],"layout.":[151],"circuit":[153],"described":[155],"using":[156],"VHDL":[158],"model,":[159],"simulated":[160],"verify":[162],"correct":[164],"functionality":[165],"from":[166],"application":[168],"point":[169],"view,":[171],"performance":[173],"evaluated,":[175],"both":[176],"terms":[178],"speed":[180],"consumption.":[183],"Results":[184],"pinpoints":[185],"that":[186,212],"with":[189],"appropriate":[191],"clock":[192],"solution":[193],"can":[194],"reach":[195],"reduction":[198],"over":[202],"CMOS.":[203],"This":[204],"analysis":[205],"highlights":[206],"quantitatively,":[207],"not":[209],"only":[210],"qualitatively,":[211],"perfectly":[216],"Massively":[219],"Parallel":[220],"Data":[221],"Analysis":[222],"applications.":[223]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":10}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}