{"id":"https://openalex.org/W4413278514","doi":"https://doi.org/10.1109/icfpt64416.2024.11113464","title":"FPGA Routing Optimization Based on Multi-Level MUX Architecture","display_name":"FPGA Routing Optimization Based on Multi-Level MUX Architecture","publication_year":2024,"publication_date":"2024-12-10","ids":{"openalex":"https://openalex.org/W4413278514","doi":"https://doi.org/10.1109/icfpt64416.2024.11113464"},"language":"en","primary_location":{"id":"doi:10.1109/icfpt64416.2024.11113464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icfpt64416.2024.11113464","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 International Conference on Field Programmable Technology (ICFPT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064585448","display_name":"Xue\u2010ning Li","orcid":null},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xizheng Li","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075312901","display_name":"Kaichuang Shi","orcid":"https://orcid.org/0000-0002-6343-2930"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kaichuang Shi","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109302065","display_name":"Wai-Shing Luk","orcid":"https://orcid.org/0009-0006-8322-8079"},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wai-Shing Luk","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100396802","display_name":"Hao Zhou","orcid":"https://orcid.org/0000-0001-7339-9006"},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hao Zhou","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002732486","display_name":"Lingli Wang","orcid":"https://orcid.org/0000-0002-0579-3527"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lingli Wang","raw_affiliation_strings":["Fudan University,State Key Laboratory of ASIC and System,Shanghai,China"],"affiliations":[{"raw_affiliation_string":"Fudan University,State Key Laboratory of ASIC and System,Shanghai,China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5064585448"],"corresponding_institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4391767673"],"apc_list":null,"apc_paid":null,"fwci":0.5198,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.70968977,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.8902000188827515,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.8902000188827515,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.8285999894142151,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14276","display_name":"Power Systems and Technologies","score":0.8016999959945679,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7363900542259216},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6618351340293884},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.6214630603790283},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6131836175918579},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4752904176712036},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44044435024261475},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.351714551448822},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3222357928752899},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.20008298754692078},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15995565056800842}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7363900542259216},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6618351340293884},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.6214630603790283},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6131836175918579},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4752904176712036},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44044435024261475},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.351714551448822},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3222357928752899},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.20008298754692078},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15995565056800842},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icfpt64416.2024.11113464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icfpt64416.2024.11113464","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 International Conference on Field Programmable Technology (ICFPT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6700000166893005,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W2005602803","https://openalex.org/W2105011467","https://openalex.org/W2148676074","https://openalex.org/W2527244689","https://openalex.org/W2911751195","https://openalex.org/W2918037051","https://openalex.org/W2988786786","https://openalex.org/W3007436455","https://openalex.org/W3033033241","https://openalex.org/W3047848469","https://openalex.org/W3132749493","https://openalex.org/W3163415307","https://openalex.org/W3205322313","https://openalex.org/W3217476762","https://openalex.org/W4321637526","https://openalex.org/W4391429094"],"related_works":["https://openalex.org/W4323268213","https://openalex.org/W3146360095","https://openalex.org/W4246691826","https://openalex.org/W4238119721","https://openalex.org/W2184011203","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2038503502","https://openalex.org/W2154356865"],"abstract_inverted_index":{"The":[0,30,154,192],"routing":[1,10,52,64,81,180,220,233],"architecture":[2,82,162,188],"significantly":[3],"impacts":[4],"FPGA":[5],"performance":[6],"and":[7,18,116,119,124,151,215,227,232],"area.":[8,221],"Traditionally,":[9],"resources":[11],"are":[12],"divided":[13],"into":[14],"connection":[15],"blocks":[16,20],"(CBs)":[17],"switch":[19],"(SBs)":[21],"to":[22,104,127,183],"implement":[23,68],"interconnects":[24],"based":[25,83,92,131,146],"on":[26,62,84,93,132,147],"high-fanin":[27],"multiplexers":[28],"(MUXes).":[29],"number":[31,47,112,120],"of":[32,48,59,98,113,121,205,210],"MUX":[33,99,108,114,122,194,206],"levels":[34,115],"is":[35,56,71],"typically":[36],"fixed":[37],"in":[38,42,168,178,213,218,230],"past":[39],"studies,":[40],"resulting":[41],"signals":[43],"traversing":[44],"a":[45,57,79,164,174],"consistent":[46],"MUXes":[49,67],"within":[50],"defined":[51],"blocks.":[53],"Although":[54],"there":[55],"lot":[58],"research":[60],"focusing":[61],"the":[63,106,111,117,129,148,159,198,203,237],"model,":[65],"how":[66],"these":[69,133],"connections":[70,94],"less":[72],"explored.":[73],"In":[74,135],"this":[75],"paper,":[76],"we":[77,137],"propose":[78],"novel":[80],"multi-level":[85,107,161,193],"MUXes,":[86],"allowing":[87],"for":[88,142],"flexible":[89],"driving":[90],"relationships":[91],"through":[95],"various":[96],"numbers":[97],"levels.":[100],"We":[101],"define":[102],"parameters":[103,150],"describe":[105],"architecture,":[109],"covering":[110],"type":[118],"fan-ins,":[123],"conduct":[125],"experiments":[126],"investigate":[128],"effectiveness":[130],"parameters.":[134],"addition,":[136],"employ":[138],"Bayesian":[139],"Optimization":[140],"(BO)":[141],"design":[143],"space":[144],"exploration":[145,204],"above":[149],"wire":[152],"distribution.":[153],"experimental":[155],"result":[156,195,201],"demonstrates":[157],"that":[158],"optimized":[160],"achieves":[163],"13.6":[165],"%":[166,176,212,217,226],"reduction":[167],"critical":[169],"path":[170],"delay":[171],"(CPD)":[172],"with":[173],"4.3":[175],"overhead":[177],"total":[179,219],"area":[181,234],"compared":[182],"General":[184],"Routing":[185],"Block":[186],"(GRB)":[187],"using":[189],"VTR":[190],"benchmarks.":[191],"also":[196],"surpasses":[197],"BO":[199],"searched":[200],"without":[202],"arrangement,":[207],"showing":[208],"improvements":[209],"6.9":[211],"CPD":[214,231],"2.1":[216],"Additionally,":[222],"it":[223],"shows":[224],"8.6":[225],"5.0%":[228],"improvement":[229],"respectively":[235],"than":[236],"versatile":[238],"interconnection":[239],"block":[240],"(VIB)":[241],"architecture.":[242]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}