{"id":"https://openalex.org/W4392945124","doi":"https://doi.org/10.1109/iceic61013.2024.10457110","title":"Synergizing CXL with Unified Memory for Scalable GPU Memory Expansion","display_name":"Synergizing CXL with Unified Memory for Scalable GPU Memory Expansion","publication_year":2024,"publication_date":"2024-01-28","ids":{"openalex":"https://openalex.org/W4392945124","doi":"https://doi.org/10.1109/iceic61013.2024.10457110"},"language":"en","primary_location":{"id":"doi:10.1109/iceic61013.2024.10457110","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iceic61013.2024.10457110","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 International Conference on Electronics, Information, and Communication (ICEIC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100750779","display_name":"Junseong Lee","orcid":"https://orcid.org/0000-0002-5004-7865"},"institutions":[{"id":"https://openalex.org/I848706","display_name":"Sungkyunkwan University","ror":"https://ror.org/04q78tk20","country_code":"KR","type":"education","lineage":["https://openalex.org/I848706"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Junseung Lee","raw_affiliation_strings":["Sungkyunkwan University,Dept. of Electrical and Computer Engineering,Suwon,Republic of Korea","Dept. of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Sungkyunkwan University,Dept. of Electrical and Computer Engineering,Suwon,Republic of Korea","institution_ids":["https://openalex.org/I848706"]},{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, Republic of Korea","institution_ids":["https://openalex.org/I848706"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100354952","display_name":"Jung Rae Kim","orcid":"https://orcid.org/0000-0003-0103-7457"},"institutions":[{"id":"https://openalex.org/I848706","display_name":"Sungkyunkwan University","ror":"https://ror.org/04q78tk20","country_code":"KR","type":"education","lineage":["https://openalex.org/I848706"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jungrae Kim","raw_affiliation_strings":["Sungkyunkwan University,Dept. of Semiconductor Systems Engineering,Suwon,Republic of Korea","Dept. of Semiconductor Systems Engineering, Sungkyunkwan University, Suwon, Republic of Korea"],"affiliations":[{"raw_affiliation_string":"Sungkyunkwan University,Dept. of Semiconductor Systems Engineering,Suwon,Republic of Korea","institution_ids":["https://openalex.org/I848706"]},{"raw_affiliation_string":"Dept. of Semiconductor Systems Engineering, Sungkyunkwan University, Suwon, Republic of Korea","institution_ids":["https://openalex.org/I848706"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5100750779"],"corresponding_institution_ids":["https://openalex.org/I848706"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.02654416,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9247999787330627,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9247999787330627,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8003028631210327},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.674260139465332},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6432465314865112},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44652771949768066},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4152669906616211},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.21119922399520874},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13019245862960815}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8003028631210327},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.674260139465332},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6432465314865112},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44652771949768066},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4152669906616211},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.21119922399520874},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13019245862960815}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iceic61013.2024.10457110","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/iceic61013.2024.10457110","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 International Conference on Electronics, Information, and Communication (ICEIC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8100000023841858}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2949486320","https://openalex.org/W3042369493","https://openalex.org/W3186076368","https://openalex.org/W4315630617","https://openalex.org/W4361194512","https://openalex.org/W4365512576","https://openalex.org/W4379116139"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2389214306","https://openalex.org/W2382290278","https://openalex.org/W2478288626","https://openalex.org/W4391913857","https://openalex.org/W2350741829"],"abstract_inverted_index":{"Heterogeneous":[0],"computing,":[1],"which":[2,35],"combines":[3],"the":[4,54,65,74,83,89],"power":[5],"of":[6,26,56,67,85],"CPUs":[7,60],"and":[8,61],"GPUs,":[9],"is":[10,36],"increasingly":[11],"important":[12],"in":[13,24,70],"today's":[14],"data-centric":[15],"era.":[16],"However,":[17],"it":[18],"also":[19],"presents":[20],"significant":[21],"challenges,":[22],"particularly":[23],"terms":[25],"GPU":[27],"memory":[28,43,69],"management.":[29],"Compute":[30],"eXpress":[31],"Link":[32],"(CXL)":[33],"technology,":[34],"supported":[37],"by":[38],"industry":[39],"leaders,":[40],"offers":[41],"enhanced":[42],"expansion":[44],"capabilities.":[45],"Alongside":[46],"this,":[47],"NVIDIA's":[48],"Unified":[49],"Memory":[50],"(UM)":[51],"system":[52],"simplifies":[53],"process":[55],"sharing":[57],"data":[58],"between":[59],"GPUs.":[62],"We":[63],"explore":[64],"role":[66],"CXL":[68],"various":[71],"scenarios":[72],"within":[73],"UM":[75],"framework":[76],"while":[77],"simultaneously":[78],"highlighting":[79],"issues":[80],"such":[81],"as":[82],"handling":[84],"page":[86],"faults":[87],"at":[88],"software":[90],"level.":[91]},"counts_by_year":[],"updated_date":"2025-12-23T23:11:35.936235","created_date":"2025-10-10T00:00:00"}
