{"id":"https://openalex.org/W4417169959","doi":"https://doi.org/10.1109/icecs66544.2025.11270815","title":"A 65pF-CL, \u221246dB-PSRR at 1MHz, Wide Supply Bulk-Biasing FVF-Based LDO Consuming 6.6 uA","display_name":"A 65pF-CL, \u221246dB-PSRR at 1MHz, Wide Supply Bulk-Biasing FVF-Based LDO Consuming 6.6 uA","publication_year":2025,"publication_date":"2025-11-17","ids":{"openalex":"https://openalex.org/W4417169959","doi":"https://doi.org/10.1109/icecs66544.2025.11270815"},"language":"en","primary_location":{"id":"doi:10.1109/icecs66544.2025.11270815","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270815","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5093697243","display_name":"Francesco Spreafico","orcid":null},"institutions":[{"id":"https://openalex.org/I66752286","display_name":"University of Milano-Bicocca","ror":"https://ror.org/01ynf4891","country_code":"IT","type":"education","lineage":["https://openalex.org/I66752286"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Francesco Spreafico","raw_affiliation_strings":["University of Milano-Bicocca,Dep. of Physics G. Occhialini,Milan,Italy"],"affiliations":[{"raw_affiliation_string":"University of Milano-Bicocca,Dep. of Physics G. Occhialini,Milan,Italy","institution_ids":["https://openalex.org/I66752286"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064389210","display_name":"Luca Sant","orcid":"https://orcid.org/0000-0003-4366-3843"},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Luca Sant","raw_affiliation_strings":["Infineon Technologies AG,Villach,Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG,Villach,Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031520400","display_name":"Richard Gaggl","orcid":"https://orcid.org/0009-0003-9365-1143"},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Richard Gaggl","raw_affiliation_strings":["Infineon Technologies AG,Villach,Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies AG,Villach,Austria","institution_ids":["https://openalex.org/I4210131793"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038780136","display_name":"A. Bas\u00e7hirotto","orcid":"https://orcid.org/0000-0002-8844-5754"},"institutions":[{"id":"https://openalex.org/I66752286","display_name":"University of Milano-Bicocca","ror":"https://ror.org/01ynf4891","country_code":"IT","type":"education","lineage":["https://openalex.org/I66752286"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Baschirotto","raw_affiliation_strings":["University of Milano-Bicocca,Dep. of Physics G. Occhialini,Milan,Italy"],"affiliations":[{"raw_affiliation_string":"University of Milano-Bicocca,Dep. of Physics G. Occhialini,Milan,Italy","institution_ids":["https://openalex.org/I66752286"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5093697243"],"corresponding_institution_ids":["https://openalex.org/I66752286"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.42428242,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.4124999940395355,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.4124999940395355,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.32690000534057617,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.13500000536441803,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pmos-logic","display_name":"PMOS logic","score":0.7050999999046326},{"id":"https://openalex.org/keywords/power-supply-rejection-ratio","display_name":"Power supply rejection ratio","score":0.573199987411499},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5110999941825867},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4415000081062317},{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.42559999227523804},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.37779998779296875},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.359499990940094},{"id":"https://openalex.org/keywords/load-regulation","display_name":"Load regulation","score":0.3425999879837036}],"concepts":[{"id":"https://openalex.org/C27050352","wikidata":"https://www.wikidata.org/wiki/Q173605","display_name":"PMOS logic","level":4,"score":0.7050999999046326},{"id":"https://openalex.org/C15892472","wikidata":"https://www.wikidata.org/wiki/Q1482413","display_name":"Power supply rejection ratio","level":4,"score":0.573199987411499},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5110999941825867},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4535999894142151},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4415000081062317},{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.42559999227523804},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.42309999465942383},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3903999924659729},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.37779998779296875},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.359499990940094},{"id":"https://openalex.org/C2776098794","wikidata":"https://www.wikidata.org/wiki/Q6663315","display_name":"Load regulation","level":3,"score":0.3425999879837036},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3361000120639801},{"id":"https://openalex.org/C198352243","wikidata":"https://www.wikidata.org/wiki/Q37105","display_name":"Line (geometry)","level":2,"score":0.3276999890804291},{"id":"https://openalex.org/C2777901765","wikidata":"https://www.wikidata.org/wiki/Q6553328","display_name":"Line regulation","level":5,"score":0.3264999985694885},{"id":"https://openalex.org/C151799858","wikidata":"https://www.wikidata.org/wiki/Q587008","display_name":"Switched-mode power supply","level":3,"score":0.3215000033378601},{"id":"https://openalex.org/C131782439","wikidata":"https://www.wikidata.org/wiki/Q1455581","display_name":"Frequency compensation","level":4,"score":0.29580000042915344},{"id":"https://openalex.org/C2779110517","wikidata":"https://www.wikidata.org/wiki/Q1240788","display_name":"Supervisor","level":2,"score":0.29249998927116394},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.28700000047683716},{"id":"https://openalex.org/C85761212","wikidata":"https://www.wikidata.org/wiki/Q1974593","display_name":"Transient response","level":2,"score":0.2831999957561493},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.2809000015258789},{"id":"https://openalex.org/C15032970","wikidata":"https://www.wikidata.org/wiki/Q851210","display_name":"Dropout voltage","level":4,"score":0.274399995803833},{"id":"https://openalex.org/C92746544","wikidata":"https://www.wikidata.org/wiki/Q585184","display_name":"Pulse-width modulation","level":3,"score":0.2727999985218048},{"id":"https://openalex.org/C140501009","wikidata":"https://www.wikidata.org/wiki/Q6692746","display_name":"Low-dropout regulator","level":5,"score":0.27129998803138733},{"id":"https://openalex.org/C81455027","wikidata":"https://www.wikidata.org/wiki/Q7180955","display_name":"Phase margin","level":5,"score":0.260699987411499},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.25690001249313354}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs66544.2025.11270815","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270815","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:boa.unimib.it:10281/586843","is_oa":false,"landing_page_url":"https://hdl.handle.net/10281/586843","pdf_url":null,"source":{"id":"https://openalex.org/S4306401259","display_name":"BOA (University of Milano-Bicocca)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I66752286","host_organization_name":"University of Milano-Bicocca","host_organization_lineage":["https://openalex.org/I66752286"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2796676502","https://openalex.org/W2808559067","https://openalex.org/W4310464843","https://openalex.org/W4379527404","https://openalex.org/W4383220246","https://openalex.org/W4401879569"],"related_works":[],"abstract_inverted_index":{"A":[0],"Flipped-Voltage-Follower":[1],"(FVF)":[2],"based":[3],"LDO":[4,81,114],"is":[5,66,115],"implemented":[6],"in":[7,44,123],"55nm":[8,76],"CMOS":[9],"for":[10],"low-power":[11],"audio":[12],"applications.":[13],"It":[14],"includes":[15],"an":[16],"auxiliary":[17],"path":[18],"to":[19,25,42,51,117,126],"provide":[20],"a":[21,60,85,95,107,120,129],"proper":[22],"ac-only":[23],"bias":[24],"the":[26,29,35,45,69,75,124],"bulk":[27],"of":[28,55,62,74,80],"pass":[30],"pMOS":[31],"transistor.":[32],"This":[33],"improves":[34],"Power":[36],"Supply":[37],"Rejection":[38],"Ratio":[39],"(PSRR)":[40],"up":[41],"17dB":[43],"target":[46],"frequency":[47],"range,":[48,128],"from":[49],"50kHz":[50],"2MHz,":[52],"at":[53,64],"cost":[54],"1.5\u03bcA":[56],"additional":[57],"current.":[58],"Thus,":[59],"PSRR":[61],"\u221246dB":[63],"1MHz":[65],"measured,":[67],"despite":[68],"parasitic":[70],"and":[71,84,102,133],"coupling":[72],"effects":[73],"CMOS,":[77],"only":[78],"6.6\u03bcA":[79],"quiescent":[82],"current":[83],"limited":[86],"65pF":[87],"on-chip":[88],"load":[89,100,109],"capacitor.":[90],"Other":[91],"measurement":[92],"results":[93],"include":[94],"0.016mV/V":[96],"line":[97],"regulation,":[98],"0.036mV/mA":[99],"regulation":[101],"250ns":[103],"settling":[104],"time":[105],"under":[106],"full":[108],"step.":[110],"The":[111],"proposed":[112],"bulk-biasing":[113],"able":[116],"operate":[118],"with":[119],"supply":[121],"voltage":[122],"1.08V":[125],"1.8V":[127],"maximum":[130],"efficiency":[131],"\u03b7>91%":[132],"80mV":[134],"minimum":[135],"dropout.":[136]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-12-09T00:00:00"}