{"id":"https://openalex.org/W4417169623","doi":"https://doi.org/10.1109/icecs66544.2025.11270759","title":"LOMOS: A Power-Efficient Topology for CMOS Logic Gate Design","display_name":"LOMOS: A Power-Efficient Topology for CMOS Logic Gate Design","publication_year":2025,"publication_date":"2025-11-17","ids":{"openalex":"https://openalex.org/W4417169623","doi":"https://doi.org/10.1109/icecs66544.2025.11270759"},"language":null,"primary_location":{"id":"doi:10.1109/icecs66544.2025.11270759","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270759","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5096056217","display_name":"Salma Gabr","orcid":null},"institutions":[{"id":"https://openalex.org/I107720978","display_name":"Ain Shams University","ror":"https://ror.org/00cb9w016","country_code":"EG","type":"education","lineage":["https://openalex.org/I107720978"]}],"countries":["EG"],"is_corresponding":true,"raw_author_name":"Salma Gabr","raw_affiliation_strings":["Ain Shams University,Department of Electronics and Communication Engineering,Cairo,Egypt"],"affiliations":[{"raw_affiliation_string":"Ain Shams University,Department of Electronics and Communication Engineering,Cairo,Egypt","institution_ids":["https://openalex.org/I107720978"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061566407","display_name":"Sameh A. Ibrahim","orcid":"https://orcid.org/0000-0001-8049-1441"},"institutions":[{"id":"https://openalex.org/I107720978","display_name":"Ain Shams University","ror":"https://ror.org/00cb9w016","country_code":"EG","type":"education","lineage":["https://openalex.org/I107720978"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Sameh Ibrahim","raw_affiliation_strings":["Ain Shams University,Department of Electronics and Communication Engineering,Cairo,Egypt"],"affiliations":[{"raw_affiliation_string":"Ain Shams University,Department of Electronics and Communication Engineering,Cairo,Egypt","institution_ids":["https://openalex.org/I107720978"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5096056217"],"corresponding_institution_ids":["https://openalex.org/I107720978"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.42404837,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.8080999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.8080999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10663","display_name":"Advanced Battery Technologies Research","score":0.03319999948143959,"subfield":{"id":"https://openalex.org/subfields/2203","display_name":"Automotive Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.016100000590085983,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.6474000215530396},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5720999836921692},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5483999848365784},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.5396999716758728},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5008000135421753},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4875999987125397},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.4352000057697296},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.35420000553131104},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.35370001196861267}],"concepts":[{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.6474000215530396},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6363000273704529},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5720999836921692},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5483999848365784},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.5396999716758728},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5038999915122986},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5008000135421753},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4875999987125397},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4352000057697296},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.42010000348091125},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4115999937057495},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.35420000553131104},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.35370001196861267},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3375999927520752},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.3357999920845032},{"id":"https://openalex.org/C555008776","wikidata":"https://www.wikidata.org/wiki/Q267298","display_name":"Battery (electricity)","level":3,"score":0.3255999982357025},{"id":"https://openalex.org/C129014197","wikidata":"https://www.wikidata.org/wiki/Q906544","display_name":"Power semiconductor device","level":3,"score":0.3093999922275543},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.3046000003814697},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.30070000886917114},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.3001999855041504},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.29589998722076416},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.27320000529289246},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.26339998841285706},{"id":"https://openalex.org/C178911571","wikidata":"https://www.wikidata.org/wiki/Q593143","display_name":"Power electronics","level":3,"score":0.26190000772476196},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.25859999656677246}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs66544.2025.11270759","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270759","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1985875557","https://openalex.org/W2013275447","https://openalex.org/W2043128052","https://openalex.org/W2102212033","https://openalex.org/W2404183818"],"related_works":[],"abstract_inverted_index":{"Throughout":[0],"the":[1,26,42,49],"years,":[2],"there":[3],"has":[4],"always":[5],"been":[6],"a":[7,32,84,124],"tradeoff":[8],"in":[9,31,45,52,71,104,110],"digital":[10],"design":[11,27,118],"between":[12,94],"three":[13],"main":[14],"variables":[15],"which":[16,89],"are":[17],"power,":[18,74],"performance":[19],"and":[20,58,69,77,98,107],"area.":[21,99],"According":[22],"to":[23,35,47,114,131],"each":[24],"application,":[25],"would":[28],"be":[29],"optimized":[30],"certain":[33],"way":[34],"accomplish":[36],"its":[37,121],"specifications.":[38],"Nowadays,":[39],"power":[40,95,106,112],"is":[41,87],"primary":[43],"focus":[44],"order":[46],"extend":[48],"battery":[50],"life":[51],"modern":[53],"electronic":[54],"devices":[55],"like":[56],"sensors":[57],"other":[59],"portable":[60],"devices.":[61],"In":[62],"this":[63],"paper,":[64],"different":[65],"topologies":[66],"were":[67],"implemented":[68],"compared":[70,113],"terms":[72],"of":[73],"area,":[75],"swing,":[76],"propagation":[78],"delay":[79],"through":[80],"transistor-level":[81],"simulations.":[82],"Also,":[83],"new":[85],"topology":[86],"proposed":[88],"gives":[90],"an":[91],"excellent":[92],"balance":[93],"consumption,":[96],"speed,":[97],"It":[100],"achieves":[101],"90%":[102],"reduction":[103,109],"dynamic":[105],"68%":[108],"static":[111],"conventional":[115],"CMOS.":[116],"The":[117],"reliably":[119],"maintains":[120],"functionality":[122],"across":[123,134],"wide":[125],"temperature":[126],"range,":[127],"from":[128],"\u201320":[129],"\u00b0C":[130],"125":[132],"\u00b0C,":[133],"all":[135],"corners":[136],"demonstrating":[137],"robust":[138],"thermal":[139],"stability.":[140]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-12-09T00:00:00"}
