{"id":"https://openalex.org/W4417170141","doi":"https://doi.org/10.1109/icecs66544.2025.11270614","title":"VerTrace: An Open-Source Toolchain for Portable Stimulus Vertical Reuse","display_name":"VerTrace: An Open-Source Toolchain for Portable Stimulus Vertical Reuse","publication_year":2025,"publication_date":"2025-11-17","ids":{"openalex":"https://openalex.org/W4417170141","doi":"https://doi.org/10.1109/icecs66544.2025.11270614"},"language":null,"primary_location":{"id":"doi:10.1109/icecs66544.2025.11270614","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270614","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043261166","display_name":"Petr Bardonek","orcid":null},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":true,"raw_author_name":"Petr Bardonek","raw_affiliation_strings":["Brno University of Technology,Brno,Czech Republic"],"affiliations":[{"raw_affiliation_string":"Brno University of Technology,Brno,Czech Republic","institution_ids":["https://openalex.org/I60587646"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010849227","display_name":"Marcela Zachari\u00e1\u0161ov\u00e1","orcid":null},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Marcela Zachari\u00e1\u0161ov\u00e1","raw_affiliation_strings":["Brno University of Technology,Brno,Czech Republic"],"affiliations":[{"raw_affiliation_string":"Brno University of Technology,Brno,Czech Republic","institution_ids":["https://openalex.org/I60587646"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5043261166"],"corresponding_institution_ids":["https://openalex.org/I60587646"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.45628386,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5062999725341797,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.5062999725341797,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.296999990940094,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.06599999964237213,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/toolchain","display_name":"Toolchain","score":0.9973000288009644},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.8403000235557556},{"id":"https://openalex.org/keywords/executable","display_name":"Executable","score":0.5846999883651733},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.35600000619888306},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.33320000767707825},{"id":"https://openalex.org/keywords/engineering-design-process","display_name":"Engineering design process","score":0.30410000681877136}],"concepts":[{"id":"https://openalex.org/C2777062904","wikidata":"https://www.wikidata.org/wiki/Q545406","display_name":"Toolchain","level":3,"score":0.9973000288009644},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.8403000235557556},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6205999851226807},{"id":"https://openalex.org/C160145156","wikidata":"https://www.wikidata.org/wiki/Q778586","display_name":"Executable","level":2,"score":0.5846999883651733},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5508000254631042},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.40380001068115234},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.35600000619888306},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35179999470710754},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.33320000767707825},{"id":"https://openalex.org/C34972735","wikidata":"https://www.wikidata.org/wiki/Q2920267","display_name":"Engineering design process","level":2,"score":0.30410000681877136},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.3027999997138977},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.2825999855995178},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.2818000018596649},{"id":"https://openalex.org/C137981799","wikidata":"https://www.wikidata.org/wiki/Q1369184","display_name":"Reusability","level":3,"score":0.2667999863624573},{"id":"https://openalex.org/C195672273","wikidata":"https://www.wikidata.org/wiki/Q6888132","display_name":"Model-based design","level":2,"score":0.2603999972343445},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.2556000053882599},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.2515999972820282}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs66544.2025.11270614","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270614","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W347636100"],"related_works":[],"abstract_inverted_index":{"The":[0,37,96],"Portable":[1],"Test":[2],"and":[3,30,39,51,86,91,118],"Stimulus":[4],"Standard":[5],"(PSS)":[6],"is":[7],"a":[8,73,124],"new":[9],"standard":[10,38],"used":[11],"in":[12,43,133],"the":[13,20,44,57,78,111],"verification":[14,24],"of":[15,22,81,105],"hardware":[16],"designs.":[17],"It":[18],"enables":[19],"reuse":[21,80,122],"abstract":[23,61],"scenarios":[25,62],"across":[26],"platforms,":[27],"design":[28,31,116,135],"variants,":[29],"hierarchies":[32],"through":[33],"portable":[34],"models":[35],"(PMs).":[36],"use":[40],"cases":[41],"presented":[42],"publications":[45],"primarily":[46],"focus":[47],"on":[48,100],"scenario":[49],"creation":[50],"constraint":[52],"solving":[53],"within":[54],"PMs,":[55,82],"while":[56],"infrastructure":[58],"for":[59,76],"transforming":[60],"into":[63,128],"executable":[64],"tests":[65],"remains":[66],"largely":[67],"manual.":[68],"This":[69],"paper":[70],"presents":[71],"VerTrace,":[72],"unique":[74],"toolchain":[75,97,112],"automating":[77],"vertical":[79,121],"developed":[83],"by":[84,92],"extending":[85],"adapting":[87],"existing":[88],"open-source":[89,102],"tools":[90],"developing":[93],"custom":[94],"tools.":[95],"was":[98],"evaluated":[99],"several":[101],"RTL":[103],"designs":[104],"varying":[106],"complexity.":[107],"Results":[108],"demonstrate":[109],"that":[110],"scales":[113],"effectively":[114],"with":[115],"complexity":[117],"transforms":[119],"PSS":[120],"from":[123],"manual,":[125],"error-prone":[126],"process":[127],"an":[129],"automated":[130],"approach":[131],"grounded":[132],"static":[134],"analysis.":[136]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-12-09T00:00:00"}