{"id":"https://openalex.org/W4417169602","doi":"https://doi.org/10.1109/icecs66544.2025.11270540","title":"Bridging Formal and Dynamic Verification: A Unified Methodology for Design Verification","display_name":"Bridging Formal and Dynamic Verification: A Unified Methodology for Design Verification","publication_year":2025,"publication_date":"2025-11-17","ids":{"openalex":"https://openalex.org/W4417169602","doi":"https://doi.org/10.1109/icecs66544.2025.11270540"},"language":null,"primary_location":{"id":"doi:10.1109/icecs66544.2025.11270540","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270540","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5120734581","display_name":"Kareem Waseem Elsaid","orcid":null},"institutions":[{"id":"https://openalex.org/I1295703814","display_name":"World Vision","ror":"https://ror.org/01s0tbj55","country_code":"US","type":"nonprofit","lineage":["https://openalex.org/I1295703814","https://openalex.org/I4210093867"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kareem Waseem Elsaid","raw_affiliation_strings":["Si-Vision,Design Verification Department,Cairo,Egypt"],"affiliations":[{"raw_affiliation_string":"Si-Vision,Design Verification Department,Cairo,Egypt","institution_ids":["https://openalex.org/I1295703814"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087270221","display_name":"Mohamed Abbas","orcid":"https://orcid.org/0000-0003-1045-384X"},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Magdy Ahmed Abbas","raw_affiliation_strings":["Cairo University,Electronics and Electrical Communication,Cairo,Egypt"],"affiliations":[{"raw_affiliation_string":"Cairo University,Electronics and Electrical Communication,Cairo,Egypt","institution_ids":["https://openalex.org/I145487455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5120758645","display_name":"Ahmed Hassan Abdelmonem","orcid":null},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Ahmed Hassan Abdelmonem","raw_affiliation_strings":["Cairo University,Electronics and Electrical Communication,Cairo,Egypt"],"affiliations":[{"raw_affiliation_string":"Cairo University,Electronics and Electrical Communication,Cairo,Egypt","institution_ids":["https://openalex.org/I145487455"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5120734582","display_name":"Philopateer Awny Abdullah","orcid":null},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Philopateer Awny Abdullah","raw_affiliation_strings":["Cairo University,Electronics and Electrical Communication,Cairo,Egypt"],"affiliations":[{"raw_affiliation_string":"Cairo University,Electronics and Electrical Communication,Cairo,Egypt","institution_ids":["https://openalex.org/I145487455"]}]},{"author_position":"last","author":{"id":null,"display_name":"Anton Emad Saber","orcid":null},"institutions":[{"id":"https://openalex.org/I107720978","display_name":"Ain Shams University","ror":"https://ror.org/00cb9w016","country_code":"EG","type":"education","lineage":["https://openalex.org/I107720978"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Anton Emad Saber","raw_affiliation_strings":["Ain Shams University,Communication Systems and Electrical,Cairo,Egypt"],"affiliations":[{"raw_affiliation_string":"Ain Shams University,Communication Systems and Electrical,Cairo,Egypt","institution_ids":["https://openalex.org/I107720978"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5120734581"],"corresponding_institution_ids":["https://openalex.org/I1295703814"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.3746909,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.4900999963283539,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.4900999963283539,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.43709999322891235,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.009600000455975533,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.7296000123023987},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.6859999895095825},{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.5983999967575073},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5479000210762024},{"id":"https://openalex.org/keywords/formal-methods","display_name":"Formal methods","score":0.5471000075340271},{"id":"https://openalex.org/keywords/formal-equivalence-checking","display_name":"Formal equivalence checking","score":0.47049999237060547},{"id":"https://openalex.org/keywords/intelligent-verification","display_name":"Intelligent verification","score":0.46790000796318054},{"id":"https://openalex.org/keywords/runtime-verification","display_name":"Runtime verification","score":0.4650999903678894},{"id":"https://openalex.org/keywords/high-level-verification","display_name":"High-level verification","score":0.4650000035762787}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7875999808311462},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.7296000123023987},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.6859999895095825},{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.5983999967575073},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5479000210762024},{"id":"https://openalex.org/C75606506","wikidata":"https://www.wikidata.org/wiki/Q1049183","display_name":"Formal methods","level":2,"score":0.5471000075340271},{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.47049999237060547},{"id":"https://openalex.org/C3406870","wikidata":"https://www.wikidata.org/wiki/Q6044160","display_name":"Intelligent verification","level":5,"score":0.46790000796318054},{"id":"https://openalex.org/C202973057","wikidata":"https://www.wikidata.org/wiki/Q7380130","display_name":"Runtime verification","level":3,"score":0.4650999903678894},{"id":"https://openalex.org/C187250869","wikidata":"https://www.wikidata.org/wiki/Q5754573","display_name":"High-level verification","level":5,"score":0.4650000035762787},{"id":"https://openalex.org/C41608201","wikidata":"https://www.wikidata.org/wiki/Q980509","display_name":"Embedding","level":2,"score":0.43380001187324524},{"id":"https://openalex.org/C142284323","wikidata":"https://www.wikidata.org/wiki/Q7921323","display_name":"Verification","level":5,"score":0.39500001072883606},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.37700000405311584},{"id":"https://openalex.org/C33054407","wikidata":"https://www.wikidata.org/wiki/Q6504747","display_name":"Software verification","level":5,"score":0.3743000030517578},{"id":"https://openalex.org/C116253237","wikidata":"https://www.wikidata.org/wiki/Q1437424","display_name":"Formal specification","level":2,"score":0.35519999265670776},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.35120001435279846},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.349700003862381},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.34139999747276306},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.3221000134944916},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2971000075340271},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.28940001130104065},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2890999913215637},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.28870001435279846},{"id":"https://openalex.org/C2985583900","wikidata":"https://www.wikidata.org/wiki/Q722617","display_name":"Formal description","level":2,"score":0.2863999903202057},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.28630000352859497},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2838999927043915},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.28110000491142273},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.27630001306533813},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.26930001378059387},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.2680000066757202},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.26420000195503235},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.25380000472068787}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs66544.2025.11270540","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs66544.2025.11270540","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 32nd IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1465777884","https://openalex.org/W1566925011","https://openalex.org/W1984733309","https://openalex.org/W2118572231","https://openalex.org/W2125597111","https://openalex.org/W2327836062","https://openalex.org/W2981749898","https://openalex.org/W3134705787","https://openalex.org/W4299427747"],"related_works":[],"abstract_inverted_index":{"As":[0],"system-on-chip":[1],"(SoC)":[2],"designs":[3],"increase":[4],"in":[5],"complexity,":[6],"a":[7,27,56,123],"robust,":[8],"scalable,":[9],"and":[10,46,82,112],"effective":[11],"verification":[12,17,39],"process":[13],"is":[14,18,70],"essential.":[15],"Simulation-based":[16],"the":[19,24,35,62,95],"industry":[20],"standard":[21],"to":[22,72,122],"verify":[23],"functionality":[25],"of":[26,64],"design,":[28],"but":[29,43],"it":[30],"lacks":[31],"exhaustive":[32,41],"coverage.":[33],"On":[34],"other":[36],"hand,":[37],"formal":[38,74,85],"provides":[40],"verification,":[42],"with":[44],"scalability":[45],"convergence":[47],"limitations.":[48],"To":[49],"overcome":[50],"these":[51],"limitations,":[52],"this":[53],"paper":[54],"presents":[55],"unified":[57],"hybrid":[58],"methodology":[59,97],"that":[60],"combines":[61],"advantages":[63],"both.":[65],"A":[66],"block":[67],"classification":[68],"framework":[69],"proposed":[71,96],"allocate":[73],"or":[75],"simulation":[76,88],"techniques":[77],"based":[78],"on":[79,119],"design":[80],"complexity":[81],"criticality,":[83],"embedding":[84],"tools":[86],"within":[87],"environments.":[89],"By":[90],"using":[91],"Synopsys":[92],"VC":[93],"Formal,":[94],"achieved":[98],"coverage":[99],"closure":[100],"time":[101],"reduction":[102],"by":[103,117],"more":[104],"than":[105],"50%,":[106],"eliminated":[107],"recurring":[108],"top-level":[109],"connectivity":[110],"bugs,":[111],"improved":[113],"bug":[114],"detection":[115],"latency":[116],"47%":[118],"average":[120],"compared":[121],"simulation-only":[124],"approach.":[125]},"counts_by_year":[],"updated_date":"2026-04-17T18:11:37.981687","created_date":"2025-12-09T00:00:00"}
