{"id":"https://openalex.org/W3117494601","doi":"https://doi.org/10.1109/icecs49266.2020.9294955","title":"An Efficient Register Renaming Technique with Delayed Allocation and Register Packing","display_name":"An Efficient Register Renaming Technique with Delayed Allocation and Register Packing","publication_year":2020,"publication_date":"2020-11-23","ids":{"openalex":"https://openalex.org/W3117494601","doi":"https://doi.org/10.1109/icecs49266.2020.9294955","mag":"3117494601"},"language":"en","primary_location":{"id":"doi:10.1109/icecs49266.2020.9294955","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs49266.2020.9294955","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007433502","display_name":"Xiahua Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xiahua Liu","raw_affiliation_strings":["Department of Computer Science & Technology, Engineering Research Center of Microprocessor & System, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Technology, Engineering Research Center of Microprocessor & System, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086507193","display_name":"Qinghong Yang","orcid":"https://orcid.org/0009-0005-0890-1633"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qinghong Yang","raw_affiliation_strings":["Department of Computer Science & Technology, Engineering Research Center of Microprocessor & System, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Technology, Engineering Research Center of Microprocessor & System, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072862648","display_name":"Tao Miao","orcid":"https://orcid.org/0000-0002-3768-1968"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Miao Tao","raw_affiliation_strings":["Department of Computer Science & Technology, Engineering Research Center of Microprocessor & System, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Technology, Engineering Research Center of Microprocessor & System, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033725763","display_name":"Qinshu Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210130954","display_name":"China Institute Of Communications","ror":"https://ror.org/0395ve714","country_code":"CN","type":"other","lineage":["https://openalex.org/I4210130954"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qinshu Chen","raw_affiliation_strings":["Guangdong Communications & Networks Institute, Guagzhou, China"],"affiliations":[{"raw_affiliation_string":"Guangdong Communications & Networks Institute, Guagzhou, China","institution_ids":["https://openalex.org/I4210130954"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100691552","display_name":"Xu Cheng","orcid":"https://orcid.org/0000-0002-5544-8852"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xu Cheng","raw_affiliation_strings":["Department of Computer Science & Technology, Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science & Technology, Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5007433502"],"corresponding_institution_ids":["https://openalex.org/I20231570"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19628339,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.970639705657959},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.8422293066978455},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8233140707015991},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.8093124628067017},{"id":"https://openalex.org/keywords/register","display_name":"Register (sociolinguistics)","score":0.752165675163269},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6372697949409485},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5648909211158752},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.526061475276947},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.28934305906295776},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.22611141204833984},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.13437002897262573},{"id":"https://openalex.org/keywords/memory-address","display_name":"Memory address","score":0.07028019428253174},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.056598126888275146}],"concepts":[{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.970639705657959},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.8422293066978455},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8233140707015991},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.8093124628067017},{"id":"https://openalex.org/C2779235478","wikidata":"https://www.wikidata.org/wiki/Q286576","display_name":"Register (sociolinguistics)","level":2,"score":0.752165675163269},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6372697949409485},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5648909211158752},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.526061475276947},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.28934305906295776},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.22611141204833984},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.13437002897262573},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.07028019428253174},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.056598126888275146},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs49266.2020.9294955","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs49266.2020.9294955","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1549770887","https://openalex.org/W1868432933","https://openalex.org/W1949410241","https://openalex.org/W2089854225","https://openalex.org/W2101933689","https://openalex.org/W2105808473","https://openalex.org/W2108449262","https://openalex.org/W2110078216","https://openalex.org/W2112872641","https://openalex.org/W2128252715","https://openalex.org/W2137413127","https://openalex.org/W2138777150","https://openalex.org/W2140348738","https://openalex.org/W2143188883","https://openalex.org/W2145462867","https://openalex.org/W2147098645","https://openalex.org/W2148662141","https://openalex.org/W2159254447","https://openalex.org/W2164474450","https://openalex.org/W2166908913","https://openalex.org/W2795131575","https://openalex.org/W3139936489","https://openalex.org/W4205391132","https://openalex.org/W4233277524","https://openalex.org/W4244169180","https://openalex.org/W4244922846","https://openalex.org/W4246873662","https://openalex.org/W4248734552","https://openalex.org/W4252472210","https://openalex.org/W6675071128","https://openalex.org/W6678750068","https://openalex.org/W6680666392","https://openalex.org/W6681271983","https://openalex.org/W6999016131"],"related_works":["https://openalex.org/W2159458033","https://openalex.org/W2224192221","https://openalex.org/W1967889241","https://openalex.org/W2111377238","https://openalex.org/W2161297616","https://openalex.org/W3117494601","https://openalex.org/W4247209662","https://openalex.org/W2195435904","https://openalex.org/W2148662141","https://openalex.org/W2159389028"],"abstract_inverted_index":{"Physical":[0],"register":[1,22,54,63,77],"file":[2,23,78],"in":[3,25,38],"processors":[4],"needs":[5,35],"to":[6,57],"provide":[7],"more":[8,98],"registers":[9],"when":[10,74],"the":[11,20,59,75,87,94],"issue":[12],"width":[13],"and":[14,31,53,66],"pipeline":[15],"stages":[16],"increase.":[17],"Expansion":[18],"of":[19,61],"physical":[21,62,76,101],"results":[24,69],"long":[26],"access":[27],"delay,":[28],"larger":[29],"area,":[30],"high-power":[32],"consumption,":[33],"which":[34,92],"carefully":[36],"considerations":[37],"superscalar":[39],"processor":[40],"design.":[41],"This":[42],"article":[43],"designs":[44],"an":[45],"efficient":[46],"register-renaming":[47],"technique.":[48],"It":[49],"adopts":[50],"delayed":[51],"allocation":[52],"packing":[55],"techniques":[56],"improve":[58,86],"efficiency":[60],"files":[64],"temporally":[65],"spatially.":[67],"Experimental":[68],"on":[70],"BOOMv2":[71],"show":[72],"that":[73],"contains":[79],"only":[80],"34":[81],"registers,":[82],"this":[83],"technology":[84],"can":[85],"performance":[88,96],"by":[89],"3.59-4.46":[90],"times,":[91],"achieves":[93],"peak":[95],"with":[97],"than":[99],"64":[100],"registers.":[102]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
