{"id":"https://openalex.org/W3114097450","doi":"https://doi.org/10.1109/icecs49266.2020.9294797","title":"Self-Amplifying Current-Mode Multiplier Design using a Multi-Memristor Crossbar Cell Structure","display_name":"Self-Amplifying Current-Mode Multiplier Design using a Multi-Memristor Crossbar Cell Structure","publication_year":2020,"publication_date":"2020-11-23","ids":{"openalex":"https://openalex.org/W3114097450","doi":"https://doi.org/10.1109/icecs49266.2020.9294797","mag":"3114097450"},"language":"en","primary_location":{"id":"doi:10.1109/icecs49266.2020.9294797","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs49266.2020.9294797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101773931","display_name":"Shengqi Yu","orcid":"https://orcid.org/0000-0001-8059-5793"},"institutions":[{"id":"https://openalex.org/I4210153877","display_name":"Microsystems (United Kingdom)","ror":"https://ror.org/04pvywd96","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210153877"]},{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Shengqi Yu","raw_affiliation_strings":["Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK","institution_ids":["https://openalex.org/I84884186","https://openalex.org/I4210153877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077777787","display_name":"Rishad Shafik","orcid":"https://orcid.org/0000-0001-5444-537X"},"institutions":[{"id":"https://openalex.org/I4210153877","display_name":"Microsystems (United Kingdom)","ror":"https://ror.org/04pvywd96","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210153877"]},{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Rishad Shafik","raw_affiliation_strings":["Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK","institution_ids":["https://openalex.org/I84884186","https://openalex.org/I4210153877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046259966","display_name":"Thanasin Bunnam","orcid":"https://orcid.org/0000-0002-5014-6441"},"institutions":[{"id":"https://openalex.org/I4210153877","display_name":"Microsystems (United Kingdom)","ror":"https://ror.org/04pvywd96","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210153877"]},{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Thanasin Bunnam","raw_affiliation_strings":["Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK","institution_ids":["https://openalex.org/I84884186","https://openalex.org/I4210153877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060049022","display_name":"Kaiyun Chen","orcid":"https://orcid.org/0000-0003-1974-9428"},"institutions":[{"id":"https://openalex.org/I4210153877","display_name":"Microsystems (United Kingdom)","ror":"https://ror.org/04pvywd96","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210153877"]},{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Kaiyun Chen","raw_affiliation_strings":["Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK","institution_ids":["https://openalex.org/I84884186","https://openalex.org/I4210153877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029446985","display_name":"Alex Yakovlev","orcid":"https://orcid.org/0000-0003-0826-9330"},"institutions":[{"id":"https://openalex.org/I4210153877","display_name":"Microsystems (United Kingdom)","ror":"https://ror.org/04pvywd96","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210153877"]},{"id":"https://openalex.org/I84884186","display_name":"Newcastle University","ror":"https://ror.org/01kj2bm70","country_code":"GB","type":"education","lineage":["https://openalex.org/I84884186"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Alex Yakovlev","raw_affiliation_strings":["Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Research Group, Newcastle University, Newcastle upon Tyne, UK","institution_ids":["https://openalex.org/I84884186","https://openalex.org/I4210153877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4163,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.62952971,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":"1","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.7817910313606262},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6759806275367737},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5874617695808411},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5564391016960144},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5152164101600647},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49434685707092285},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4612186849117279},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.44905829429626465},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.41350096464157104},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2733760476112366},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19352486729621887},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.17991521954536438},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1752464771270752},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.14403679966926575}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.7817910313606262},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6759806275367737},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5874617695808411},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5564391016960144},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5152164101600647},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49434685707092285},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4612186849117279},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.44905829429626465},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.41350096464157104},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2733760476112366},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19352486729621887},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.17991521954536438},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1752464771270752},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.14403679966926575},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs49266.2020.9294797","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs49266.2020.9294797","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1538184337","https://openalex.org/W1988726414","https://openalex.org/W2081729575","https://openalex.org/W2126024912","https://openalex.org/W2141776905","https://openalex.org/W2244859704","https://openalex.org/W2569842290","https://openalex.org/W2583906370","https://openalex.org/W2599999212","https://openalex.org/W2775771159","https://openalex.org/W2795849550","https://openalex.org/W2808697572","https://openalex.org/W3036540556"],"related_works":["https://openalex.org/W2171373222","https://openalex.org/W2778612236","https://openalex.org/W2897293593","https://openalex.org/W2556310577","https://openalex.org/W2157555699","https://openalex.org/W2778973728","https://openalex.org/W2057187623","https://openalex.org/W2474203529","https://openalex.org/W3020887452","https://openalex.org/W2139901278"],"abstract_inverted_index":{"Multipliers":[0],"play":[1],"a":[2,25,36,52,58,109,135,152],"major":[3],"role":[4],"in":[5,108,165],"modern":[6],"compute-intensive":[7],"applications":[8],"such":[9],"as":[10,82],"artificial":[11],"intelligence":[12],"(AI)":[13],"and":[14,30,44,78,183],"signal":[15],"processing.":[16],"However,":[17],"the":[18,65,70,79,83,89,92,117,122,125,131,157,160,181,187,193],"logic":[19,97,102],"complexity":[20],"of":[21,91,106,124,186],"conventional":[22,166],"multipliers":[23],"is":[24,51,112],"significant":[26],"challenge":[27],"for":[28,140],"energy":[29,198],"performance":[31],"efficiency.":[32],"This":[33,129],"paper":[34],"proposes":[35],"novel":[37],"current-mode":[38],"multiplier":[39,195],"without":[40],"additional":[41],"carry":[42,162],"propagation":[43,163],"amplification":[45,119],"circuits.":[46],"The":[47,104,143,189],"basic":[48],"functional":[49,182],"block":[50],"one-transistor-multi-memristor":[53],"(1TxM)":[54],"cell,":[55,64],"corresponding":[56],"to":[57,115,133,151,155,179],"partial":[59],"product":[60],"term.":[61],"In":[62],"this":[63],"transistor":[66],"enables":[67],"or":[68,76,99],"disables":[69],"term":[71],"by":[72],"switching":[73],"it":[74],"ON":[75],"OFF,":[77],"memristor":[80],"acts":[81],"resistive":[84],"memory":[85],"unit":[86],"that":[87,192],"determines":[88],"state":[90],"cell:":[93],"either":[94],"high":[95],"(i.e.":[96,101],"0)":[98],"low":[100],"1).":[103],"number":[105],"memristors":[107],"single":[110],"cell":[111,126,206],"suitably":[113],"chosen":[114],"achieve":[116],"required":[118],"depending":[120],"on":[121],"significance":[123],"current":[127,137,145],"paths.":[128],"sidesteps":[130],"need":[132],"have":[134],"separate":[136],"mirror":[138],"circuit":[139],"each":[141],"path.":[142],"parallel":[144],"paths":[146],"are":[147],"then":[148],"analogously":[149],"accumulated":[150],"common":[153],"path":[154],"define":[156],"output,":[158],"avoiding":[159],"complex":[161],"steps":[164],"multipliers.":[167],"Using":[168],"Cadence":[169],"Virtuoso":[170],"analogue":[171],"design":[172],"environment,":[173],"we":[174],"carried":[175],"out":[176],"extensive":[177],"experiments":[178],"confirm":[180],"parametric":[184],"properties":[185],"multiplier.":[188],"results":[190],"shows":[191],"proposed":[194,204],"reduces":[196],"64%":[197],"cost":[199],"when":[200],"compared":[201],"with":[202],"recently":[203],"transistor-memristor":[205],"based":[207],"approaches.":[208]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
