{"id":"https://openalex.org/W3000934636","doi":"https://doi.org/10.1109/icecs46596.2019.8964906","title":"HDC-IM: Hyperdimensional Computing In-Memory Architecture based on RRAM","display_name":"HDC-IM: Hyperdimensional Computing In-Memory Architecture based on RRAM","publication_year":2019,"publication_date":"2019-11-01","ids":{"openalex":"https://openalex.org/W3000934636","doi":"https://doi.org/10.1109/icecs46596.2019.8964906","mag":"3000934636"},"language":"en","primary_location":{"id":"doi:10.1109/icecs46596.2019.8964906","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs46596.2019.8964906","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061759563","display_name":"Jialong Liu","orcid":"https://orcid.org/0000-0002-4303-3617"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jialong Liu","raw_affiliation_strings":["BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","BNRist, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"BNRist, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075614381","display_name":"Mingyuan Ma","orcid":"https://orcid.org/0009-0000-0541-5625"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Mingyuan Ma","raw_affiliation_strings":["BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","BNRist, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"BNRist, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103138440","display_name":"Zhenhua Zhu","orcid":"https://orcid.org/0009-0007-9259-7180"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhenhua Zhu","raw_affiliation_strings":["BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","BNRist, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"BNRist, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100445061","display_name":"Yu Wang","orcid":"https://orcid.org/0000-0001-6108-5157"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yu Wang","raw_affiliation_strings":["BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","BNRist, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"BNRist, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023755254","display_name":"Huazhong Yang","orcid":"https://orcid.org/0000-0003-2421-353X"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huazhong Yang","raw_affiliation_strings":["BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","BNRist, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"BNRist, Tsinghua University,Department of Electronic Engineering,Beijing,China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"BNRist, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5061759563"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.8437,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.75198187,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"450","last_page":"453"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.8738715648651123},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7618743181228638},{"id":"https://openalex.org/keywords/von-neumann-architecture","display_name":"Von Neumann architecture","score":0.7064948678016663},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6408566832542419},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6179853081703186},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.5517874360084534},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.5197489261627197},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.5093222856521606},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.4773000478744507},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.4474473297595978},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.44159165024757385},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.414777547121048},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.39242780208587646},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3562965989112854},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.18090158700942993},{"id":"https://openalex.org/keywords/search-engine","display_name":"Search engine","score":0.12446874380111694},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11371451616287231},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10314494371414185},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09329161047935486},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08939915895462036}],"concepts":[{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.8738715648651123},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7618743181228638},{"id":"https://openalex.org/C80469333","wikidata":"https://www.wikidata.org/wiki/Q189088","display_name":"Von Neumann architecture","level":2,"score":0.7064948678016663},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6408566832542419},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6179853081703186},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.5517874360084534},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.5197489261627197},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.5093222856521606},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.4773000478744507},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4474473297595978},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.44159165024757385},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.414777547121048},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.39242780208587646},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3562965989112854},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.18090158700942993},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.12446874380111694},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11371451616287231},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10314494371414185},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09329161047935486},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08939915895462036},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs46596.2019.8964906","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs46596.2019.8964906","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.9100000262260437,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1997644415","https://openalex.org/W2004823737","https://openalex.org/W2066280488","https://openalex.org/W2081729575","https://openalex.org/W2325235790","https://openalex.org/W2476008461","https://openalex.org/W2509746188","https://openalex.org/W2512289754","https://openalex.org/W2738894409","https://openalex.org/W2768104155","https://openalex.org/W2771100829","https://openalex.org/W2895910969","https://openalex.org/W2946432794","https://openalex.org/W4229786707","https://openalex.org/W6725693772"],"related_works":["https://openalex.org/W3005999147","https://openalex.org/W1569655464","https://openalex.org/W3176428941","https://openalex.org/W3089883684","https://openalex.org/W2030843684","https://openalex.org/W4232634182","https://openalex.org/W2115150433","https://openalex.org/W4301187613","https://openalex.org/W2923038022","https://openalex.org/W2580922270"],"abstract_inverted_index":{"Brain-inspired":[0],"Hyperdimensional":[1,55],"Computing":[2],"(HDC)":[3],"is":[4,142],"a":[5,24,54,86],"fast":[6],"and":[7,20,46,123],"robust":[8],"classification":[9],"algorithm,":[10],"which":[11,78],"works":[12],"by":[13],"mapping":[14],"low-dimensional":[15],"features":[16],"to":[17,64,88,95,106],"high-dimensional":[18],"vectors":[19],"comparing":[21],"distance":[22],"in":[23,29,74,110,133],"high":[25,36],"dimensional":[26],"space.":[27],"However,":[28],"traditional":[30],"Von":[31],"Neumann":[32],"architecture,":[33],"HDC":[34,129],"causes":[35],"energy":[37,67,91,125],"consumption":[38],"because":[39],"of":[40,69,81],"large":[41],"data":[42,83],"movements":[43],"between":[44],"processor":[45],"memory.":[47],"In":[48,93],"this":[49],"paper,":[50],"we":[51,100],"propose":[52],"HDC-IM,":[53],"Computing-In-Memory":[56],"architecture":[57],"based":[58],"on":[59,130,158],"Resistive":[60],"Random-Access":[61],"Memory":[62],"(RRAM),":[63],"boost":[65],"the":[66,82,90,97],"efficiency":[68,126],"HDC.":[70,111],"HDC-IM":[71,117,141],"puts":[72],"computations":[73],"or":[75],"near":[76],"memory,":[77],"eliminates":[79],"most":[80],"movements,":[84],"providing":[85],"solution":[87],"reduce":[89],"consumption.":[92],"addition,":[94],"improve":[96],"computing":[98],"parallelism,":[99],"use":[101],"in-crossbar":[102],"RRAM-based":[103,137,156],"logic":[104],"design":[105],"process":[107],"encoding":[108],"operation":[109],"The":[112],"experimental":[113],"results":[114],"show":[115],"that":[116],"provides":[118],"more":[119,143],"than":[120,155],"100\u00d7":[121],"speedup":[122],"higher":[124,153],"compared":[127],"with":[128,135],"CPU.":[131],"Moreover,":[132],"comparison":[134],"existing":[136],"Neural":[138],"Network":[139],"accelerators,":[140],"fault-tolerant":[144],"taking":[145],"into":[146],"account":[147],"RRAM":[148,163],"device":[149],"faults,":[150],"achieving":[151],"20%":[152,162],"accuracy":[154],"DNN":[157],"ISOLET":[159],"dataset":[160],"when":[161],"devices":[164],"suffer":[165],"from":[166],"Stuck-At-Faults":[167],"(SAFs).":[168]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":3}],"updated_date":"2026-03-12T08:34:05.389933","created_date":"2025-10-10T00:00:00"}
