{"id":"https://openalex.org/W3001490512","doi":"https://doi.org/10.1109/icecs46596.2019.8964712","title":"Unfolding nonlinear dynamics in computing systems with mem-elements","display_name":"Unfolding nonlinear dynamics in computing systems with mem-elements","publication_year":2019,"publication_date":"2019-11-01","ids":{"openalex":"https://openalex.org/W3001490512","doi":"https://doi.org/10.1109/icecs46596.2019.8964712","mag":"3001490512"},"language":"en","primary_location":{"id":"doi:10.1109/icecs46596.2019.8964712","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs46596.2019.8964712","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080374992","display_name":"Mauro Di Marco","orcid":"https://orcid.org/0000-0002-0013-9112"},"institutions":[{"id":"https://openalex.org/I102064193","display_name":"University of Siena","ror":"https://ror.org/01tevnk56","country_code":"IT","type":"education","lineage":["https://openalex.org/I102064193"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mauro di Marco","raw_affiliation_strings":["University of Siena, Siena, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Siena, Siena, Italy","institution_ids":["https://openalex.org/I102064193"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069809502","display_name":"Mauro Forti","orcid":"https://orcid.org/0000-0002-3970-7201"},"institutions":[{"id":"https://openalex.org/I102064193","display_name":"University of Siena","ror":"https://ror.org/01tevnk56","country_code":"IT","type":"education","lineage":["https://openalex.org/I102064193"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mauro Forti","raw_affiliation_strings":["University of Siena, Siena, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Siena, Siena, Italy","institution_ids":["https://openalex.org/I102064193"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016472360","display_name":"Fernando Corinto","orcid":"https://orcid.org/0000-0003-4431-5701"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Fernando Corinto","raw_affiliation_strings":["Politecnico di Torino, Torino, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090657067","display_name":"Leon O. Chua","orcid":"https://orcid.org/0000-0002-1652-5464"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Leon Chua","raw_affiliation_strings":["University of California at Berkeley, Berkeley, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California at Berkeley, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.22863817,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"502","last_page":"505"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.7772207856178284},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6319949626922607},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6187689304351807},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5628533363342285},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.5241061449050903},{"id":"https://openalex.org/keywords/field","display_name":"Field (mathematics)","score":0.5217241048812866},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.5188747048377991},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5164363980293274},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.49580392241477966},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4744216799736023},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45464974641799927},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.44027864933013916},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.36440509557724},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35912883281707764},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.3340575695037842},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.30872079730033875},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22714674472808838},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19048258662223816},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09888377785682678}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.7772207856178284},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6319949626922607},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6187689304351807},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5628533363342285},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.5241061449050903},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.5217241048812866},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.5188747048377991},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5164363980293274},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.49580392241477966},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4744216799736023},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45464974641799927},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.44027864933013916},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.36440509557724},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35912883281707764},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.3340575695037842},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.30872079730033875},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22714674472808838},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19048258662223816},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09888377785682678},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs46596.2019.8964712","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs46596.2019.8964712","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:usiena-air.unisi.it:11365/1111567","is_oa":false,"landing_page_url":"http://hdl.handle.net/11365/1111567","pdf_url":null,"source":{"id":"https://openalex.org/S4377196319","display_name":"Use Siena air (University of Siena)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I102064193","host_organization_name":"University of Siena","host_organization_lineage":["https://openalex.org/I102064193"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1606202192","https://openalex.org/W1976950849","https://openalex.org/W2158711852","https://openalex.org/W2510211160","https://openalex.org/W2573602455","https://openalex.org/W2605047942","https://openalex.org/W2752233686","https://openalex.org/W2778935320","https://openalex.org/W2932983590","https://openalex.org/W2943287931"],"related_works":["https://openalex.org/W4210376836","https://openalex.org/W4210925376","https://openalex.org/W1633995705","https://openalex.org/W2596211269","https://openalex.org/W2360384790","https://openalex.org/W4232397253","https://openalex.org/W4235913033","https://openalex.org/W2109284253","https://openalex.org/W2039966832","https://openalex.org/W2359819289"],"abstract_inverted_index":{"The":[0],"following":[1],"topics":[2],"are":[3],"dealt":[4],"with:":[5],"low-power":[6],"electronics;":[7],"CMOS":[8],"integrated":[9,11],"circuits;":[10],"circuit":[12],"design;":[13,27],"learning":[14],"(artificial":[15],"intelligence);":[16],"neural":[17],"nets;":[18],"field":[19],"programmable":[20],"gate":[21],"arrays;":[22],"Internet":[23],"of":[24],"Things;":[25],"logic":[26],"memristors;":[28],"medical":[29],"signal":[30],"processing.":[31]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}