{"id":"https://openalex.org/W2911680376","doi":"https://doi.org/10.1109/icecs.2018.8617976","title":"A 25-Gb/s Low-Power Clock and Data Recovery with an Active-Stabilizing CML-CMOS Conversion","display_name":"A 25-Gb/s Low-Power Clock and Data Recovery with an Active-Stabilizing CML-CMOS Conversion","publication_year":2018,"publication_date":"2018-12-01","ids":{"openalex":"https://openalex.org/W2911680376","doi":"https://doi.org/10.1109/icecs.2018.8617976","mag":"2911680376"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2018.8617976","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2018.8617976","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075811902","display_name":"Ryosuke Noguchi","orcid":null},"institutions":[{"id":"https://openalex.org/I139159150","display_name":"University of Shiga Prefecture","ror":"https://ror.org/02dvjfw95","country_code":"JP","type":"education","lineage":["https://openalex.org/I139159150"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Ryosuke Noguchi","raw_affiliation_strings":["Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan","institution_ids":["https://openalex.org/I139159150"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042945944","display_name":"Atsuto Imajo","orcid":null},"institutions":[{"id":"https://openalex.org/I139159150","display_name":"University of Shiga Prefecture","ror":"https://ror.org/02dvjfw95","country_code":"JP","type":"education","lineage":["https://openalex.org/I139159150"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Atsuto Imajo","raw_affiliation_strings":["Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan","institution_ids":["https://openalex.org/I139159150"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082242690","display_name":"Toshiyuki Inoue","orcid":"https://orcid.org/0000-0002-6621-1412"},"institutions":[{"id":"https://openalex.org/I139159150","display_name":"University of Shiga Prefecture","ror":"https://ror.org/02dvjfw95","country_code":"JP","type":"education","lineage":["https://openalex.org/I139159150"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toshiyuki Inoue","raw_affiliation_strings":["Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan","institution_ids":["https://openalex.org/I139159150"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038761727","display_name":"Akira Tsuchiya","orcid":"https://orcid.org/0000-0002-3299-9328"},"institutions":[{"id":"https://openalex.org/I139159150","display_name":"University of Shiga Prefecture","ror":"https://ror.org/02dvjfw95","country_code":"JP","type":"education","lineage":["https://openalex.org/I139159150"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Akira Tsuchiya","raw_affiliation_strings":["Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan","institution_ids":["https://openalex.org/I139159150"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022381888","display_name":"Keiji Kishine","orcid":"https://orcid.org/0000-0003-3213-6650"},"institutions":[{"id":"https://openalex.org/I139159150","display_name":"University of Shiga Prefecture","ror":"https://ror.org/02dvjfw95","country_code":"JP","type":"education","lineage":["https://openalex.org/I139159150"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Keiji Kishine","raw_affiliation_strings":["Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Systems Engineering, The University of Shiga Prefecture, Shiga, Japan","institution_ids":["https://openalex.org/I139159150"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5075811902"],"corresponding_institution_ids":["https://openalex.org/I139159150"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.16216676,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"49","last_page":"52"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.9172509908676147},{"id":"https://openalex.org/keywords/transmission-gate","display_name":"Transmission gate","score":0.5509400367736816},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.5227549076080322},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.48651736974716187},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47980979084968567},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4378422796726227},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.43227916955947876},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.42489778995513916},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.3654692769050598},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3478087782859802},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3452591896057129},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3403708338737488},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3393547534942627},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.2583544850349426},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.24573102593421936}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.9172509908676147},{"id":"https://openalex.org/C2780949067","wikidata":"https://www.wikidata.org/wiki/Q1136752","display_name":"Transmission gate","level":4,"score":0.5509400367736816},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.5227549076080322},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.48651736974716187},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47980979084968567},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4378422796726227},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.43227916955947876},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.42489778995513916},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.3654692769050598},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3478087782859802},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3452591896057129},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3403708338737488},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3393547534942627},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.2583544850349426},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.24573102593421936},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2018.8617976","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2018.8617976","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.9100000262260437,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2124222653","https://openalex.org/W2756808819","https://openalex.org/W2806235433"],"related_works":["https://openalex.org/W2314025563","https://openalex.org/W2034971177","https://openalex.org/W2148047679","https://openalex.org/W1808420522","https://openalex.org/W3166523576","https://openalex.org/W2768607109","https://openalex.org/W2146514983","https://openalex.org/W3021108876","https://openalex.org/W2171305391","https://openalex.org/W2136100315"],"abstract_inverted_index":{"This":[0,38],"paper":[1],"presents":[2],"a":[3,131],"25-Gb/s":[4,124],"low-power":[5],"Clock":[6],"and":[7],"Data":[8],"Recovery":[9],"(CDR)":[10],"with":[11,133],"an":[12,21],"active-stabilizing":[13],"Current":[14],"Mode":[15],"Logic":[16],"(CML)-CMOS":[17],"conversion":[18,43,50,81],"circuit":[19,51],"for":[20],"optical":[22],"receiver.":[23],"To":[24],"reduce":[25,89],"power":[26,90,114],"consumption,":[27],"the":[28,35,49,62,73,76,79,86,117],"proposed":[29,118],"receiver":[30,119,132],"uses":[31],"CMOS":[32],"topology":[33],"in":[34,85],"CDR":[36],"stage.":[37],"architecture":[39],"needs":[40],"signal":[41],"level":[42],"from":[44],"CML":[45],"to":[46,54,67],"CMOS,":[47],"but":[48],"is":[52,120],"difficult":[53],"stabilize.":[55],"We":[56],"solve":[57],"this":[58],"problem":[59],"by":[60,82,92,96],"feedforwarding":[61,71],"LA":[63],"output":[64],"offset":[65],"voltage":[66],"CML-CMOS":[68,80],"converter.":[69],"The":[70,112],"suppresses":[72],"degradation":[74],"of":[75,78,104,116,130],"eye-opening":[77],"40%.":[83],"Additionally,":[84],"CDR,":[87],"we":[88],"consumption":[91,115],"more":[93],"than":[94,128],"30%":[95],"using":[97],"Transmission-Gate":[98],"Delay":[99],"Flip-flop":[100],"(TG":[101],"D-FF)":[102],"instead":[103],"conventional":[105],"C":[106],"<sup":[107],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[108],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[109],"MOS":[110],"D-FF.":[111],"measured":[113],"19.3":[121],"mW":[122],"at":[123],"operation,":[125],"80%":[126],"lower":[127],"that":[129],"CML-CDR.":[134]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}