{"id":"https://openalex.org/W2913745572","doi":"https://doi.org/10.1109/icecs.2018.8617957","title":"From multicore LDPC decoder implementations to FPGA decoder architectures: a case study","display_name":"From multicore LDPC decoder implementations to FPGA decoder architectures: a case study","publication_year":2018,"publication_date":"2018-12-01","ids":{"openalex":"https://openalex.org/W2913745572","doi":"https://doi.org/10.1109/icecs.2018.8617957","mag":"2913745572"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2018.8617957","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2018.8617957","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036825859","display_name":"Yann Delomier","orcid":null},"institutions":[{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Yann Delomier","raw_affiliation_strings":["IMS Laboratory, Bordeaux INP, France"],"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Bordeaux INP, France","institution_ids":["https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079950326","display_name":"Bertrand Le Gal","orcid":"https://orcid.org/0000-0003-2269-8756"},"institutions":[{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Bertrand Le Gal","raw_affiliation_strings":["IMS Laboratory, Bordeaux INP, France"],"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Bordeaux INP, France","institution_ids":["https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5054787159","display_name":"J\u00e9r\u00e9mie Crenne","orcid":null},"institutions":[{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jeremie Crenne","raw_affiliation_strings":["IMS Laboratory, Bordeaux INP, France"],"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Bordeaux INP, France","institution_ids":["https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031142198","display_name":"Christophe J\u00e9go","orcid":"https://orcid.org/0000-0001-5964-6277"},"institutions":[{"id":"https://openalex.org/I4210157089","display_name":"Laboratoire de l'Int\u00e9gration du Mat\u00e9riau au Syst\u00e8me","ror":"https://ror.org/04nabhy78","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I15057530","https://openalex.org/I4210091158","https://openalex.org/I4210095849","https://openalex.org/I4210157089","https://openalex.org/I4210160189"]},{"id":"https://openalex.org/I4210160189","display_name":"Institut Polytechnique de Bordeaux","ror":"https://ror.org/054qv7y42","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210160189"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Christophe Jego","raw_affiliation_strings":["IMS Laboratory, Bordeaux INP, France"],"affiliations":[{"raw_affiliation_string":"IMS Laboratory, Bordeaux INP, France","institution_ids":["https://openalex.org/I4210157089","https://openalex.org/I4210160189"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5036825859"],"corresponding_institution_ids":["https://openalex.org/I4210157089","https://openalex.org/I4210160189"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20944488,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"89","last_page":"92"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9861000180244446,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7958495020866394},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6630281209945679},{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.627091646194458},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.5814040303230286},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5630638003349304},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.559840738773346},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5294817686080933},{"id":"https://openalex.org/keywords/soft-decision-decoder","display_name":"Soft-decision decoder","score":0.49449965357780457},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4808969497680664},{"id":"https://openalex.org/keywords/software-defined-radio","display_name":"Software-defined radio","score":0.4742159843444824},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.43967217206954956},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41742733120918274},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.39011454582214355},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3818899691104889},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1328040063381195},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10939130187034607},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.07840743660926819}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7958495020866394},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6630281209945679},{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.627091646194458},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.5814040303230286},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5630638003349304},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.559840738773346},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5294817686080933},{"id":"https://openalex.org/C185588885","wikidata":"https://www.wikidata.org/wiki/Q7553811","display_name":"Soft-decision decoder","level":3,"score":0.49449965357780457},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4808969497680664},{"id":"https://openalex.org/C171115542","wikidata":"https://www.wikidata.org/wiki/Q1331892","display_name":"Software-defined radio","level":2,"score":0.4742159843444824},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.43967217206954956},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41742733120918274},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.39011454582214355},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3818899691104889},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1328040063381195},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10939130187034607},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.07840743660926819},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2018.8617957","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2018.8617957","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5600000023841858}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W596214406","https://openalex.org/W1971722970","https://openalex.org/W1980357539","https://openalex.org/W1990387811","https://openalex.org/W1994869976","https://openalex.org/W2000727227","https://openalex.org/W2004737954","https://openalex.org/W2008822461","https://openalex.org/W2019359309","https://openalex.org/W2071167126","https://openalex.org/W2094998159","https://openalex.org/W2112619536","https://openalex.org/W2128765501","https://openalex.org/W2316008198","https://openalex.org/W2482246557","https://openalex.org/W2496371751","https://openalex.org/W2547258704","https://openalex.org/W2551760120","https://openalex.org/W2586832564","https://openalex.org/W2735521573","https://openalex.org/W6668494901"],"related_works":["https://openalex.org/W2353338231","https://openalex.org/W2035769530","https://openalex.org/W2064674583","https://openalex.org/W4299647765","https://openalex.org/W2388275429","https://openalex.org/W2077272551","https://openalex.org/W1979159634","https://openalex.org/W2785398129","https://openalex.org/W1979211011","https://openalex.org/W2070869802"],"abstract_inverted_index":{"Last":[0],"generation":[1,8,62],"high-level":[2],"synthesis":[3],"(HLS)":[4],"tools":[5],"enables":[6],"hardware":[7,14,61,81,87],"of":[9,56,111],"software":[10,32,54],"descriptions":[11],"speeding":[12],"up":[13],"development":[15],"times.":[16],"LDPC":[17,57,94],"codes":[18],"are":[19,77,90],"involved":[20],"in":[21,47,96],"many":[22],"digital":[23],"standards":[24],"even":[25],"5G,":[26],"generating":[27],"high":[28],"quality":[29],"architecture":[30],"from":[31],"description":[33,55],"is":[34],"needed":[35],"for":[36,60,75,80,106],"Software":[37],"Defined":[38],"Radio":[39],"(SDR)":[40],"or":[41,109],"Cloud-RAN":[42],"(C-RAN)":[43],"systems.":[44],"Previous":[45],"works":[46],"the":[48],"field":[49],"focused":[50],"on":[51],"reusing":[52],"many-core":[53],"decoding":[58],"algorithm":[59],"purpose.":[63],"In":[64],"this":[65],"article":[66],"we":[67],"demonstrate":[68],"that":[69],"multicore":[70],"oriented":[71],"ones":[72],"once":[73],"transformed":[74],"HLS":[76],"more":[78],"suitable":[79],"decoder":[82],"generation.":[83],"Indeed,":[84],"throughputs":[85],"and":[86],"complexities":[88],"observed":[89],"closer":[91],"to":[92],"handmade":[93],"decoders":[95],"comparison":[97],"with":[98],"related":[99],"works.":[100],"Presented":[101],"results":[102],"open":[103],"new":[104],"perspective":[105],"fast":[107],"integration":[108],"prototyping":[110],"ECC":[112],"architectures.":[113]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}