{"id":"https://openalex.org/W2911853790","doi":"https://doi.org/10.1109/icecs.2018.8617897","title":"Hardware aspects of Long Short Term Memory","display_name":"Hardware aspects of Long Short Term Memory","publication_year":2018,"publication_date":"2018-12-01","ids":{"openalex":"https://openalex.org/W2911853790","doi":"https://doi.org/10.1109/icecs.2018.8617897","mag":"2911853790"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2018.8617897","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2018.8617897","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5090575086","display_name":"Ioannis Kouretas","orcid":"https://orcid.org/0000-0002-8574-8469"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"I. Kouretas","raw_affiliation_strings":["Electrical and Computer Engineering Dept., University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Dept., University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021252086","display_name":"Vassilis Paliouras","orcid":"https://orcid.org/0000-0002-1414-7500"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"V. Paliouras","raw_affiliation_strings":["Electrical and Computer Engineering Dept., University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Dept., University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5090575086"],"corresponding_institution_ids":["https://openalex.org/I174878644"],"apc_list":null,"apc_paid":null,"fwci":0.2575,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.59650364,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"521","issue":null,"first_page":"525","last_page":"528"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.7869241237640381},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7058054208755493},{"id":"https://openalex.org/keywords/piecewise","display_name":"Piecewise","score":0.6309536695480347},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5228610038757324},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.4704534113407135},{"id":"https://openalex.org/keywords/hyperbolic-function","display_name":"Hyperbolic function","score":0.4650161564350128},{"id":"https://openalex.org/keywords/term","display_name":"Term (time)","score":0.45012569427490234},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.44629815220832825},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4363332986831665},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.42431414127349854},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.41902098059654236},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4142928719520569},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.40542781352996826},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.38557708263397217},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.18672364950180054},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18533658981323242},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.1443662941455841},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09196096658706665},{"id":"https://openalex.org/keywords/data-mining","display_name":"Data mining","score":0.07591244578361511},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07243239879608154}],"concepts":[{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.7869241237640381},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7058054208755493},{"id":"https://openalex.org/C164660894","wikidata":"https://www.wikidata.org/wiki/Q2037833","display_name":"Piecewise","level":2,"score":0.6309536695480347},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5228610038757324},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.4704534113407135},{"id":"https://openalex.org/C92047909","wikidata":"https://www.wikidata.org/wiki/Q204034","display_name":"Hyperbolic function","level":2,"score":0.4650161564350128},{"id":"https://openalex.org/C61797465","wikidata":"https://www.wikidata.org/wiki/Q1188986","display_name":"Term (time)","level":2,"score":0.45012569427490234},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.44629815220832825},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4363332986831665},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.42431414127349854},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.41902098059654236},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4142928719520569},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.40542781352996826},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.38557708263397217},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.18672364950180054},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18533658981323242},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.1443662941455841},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09196096658706665},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.07591244578361511},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07243239879608154},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2018.8617897","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2018.8617897","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1815076433","https://openalex.org/W2064675550","https://openalex.org/W2136848157","https://openalex.org/W2583383421","https://openalex.org/W2589086007","https://openalex.org/W2604319603","https://openalex.org/W2730834423","https://openalex.org/W2757876702","https://openalex.org/W2762076598","https://openalex.org/W2767737961","https://openalex.org/W2799725986","https://openalex.org/W2803834712","https://openalex.org/W2808233300","https://openalex.org/W2919115771","https://openalex.org/W6638545294"],"related_works":["https://openalex.org/W2120447654","https://openalex.org/W2977179488","https://openalex.org/W2144453115","https://openalex.org/W2128223750","https://openalex.org/W4238532390","https://openalex.org/W2798215405","https://openalex.org/W2990962948","https://openalex.org/W2188872161","https://openalex.org/W3084762534","https://openalex.org/W2263132848"],"abstract_inverted_index":{"This":[0],"paper":[1],"focuses":[2],"on":[3],"hardware":[4],"implementation":[5],"aspects":[6],"of":[7,46],"a":[8,28,91],"Long-Short":[9],"Term":[10],"Memory":[11],"(LSTM)":[12],"network":[13],"application.":[14],"Initially,":[15],"certain":[16],"piecewise":[17,36],"approximations":[18],"to":[19,71,114,124],"activation":[20],"functions":[21],"\u03c3":[22,77],"and":[23,61,78,98],"tanh":[24,79],"are":[25,88],"proposed.":[26],"Next":[27],"training":[29,40,57,73],"procedure":[30,41,58],"is":[31,42],"introduced":[32],"which":[33,74],"exploits":[34],"proposed":[35,39,56,83,107],"approximations.":[37],"The":[38],"evaluated":[43],"in":[44,90,116],"terms":[45,118],"accuracy,":[47],"for":[48,66,85,119],"various":[49],"wordlengths.":[50],"Quantitative":[51],"analysis":[52],"demonstrates":[53],"that":[54,105],"the":[55,82,86,106],"converges":[59],"faster":[60],"achieves":[62],"lower":[63],"error":[64],"floor":[65],"specific":[67],"wordlengths":[68],"when":[69,122],"compared":[70,99,123],"conventional":[72],"uses":[75],"exact":[76],"derivatives.":[80],"Finally,":[81],"circuits":[84,108],"inference":[87],"synthesized":[89],"90-nm":[92],"1.0":[93],"V":[94],"CMOS":[95],"standard-cell":[96],"library":[97],"with":[100],"LUT-based":[101],"implementations.":[102,129],"Results":[103],"exhibit":[104],"achieve":[109],"significantly":[110],"decreased":[111],"complexity":[112],"up":[113],"31%":[115],"area\u00d7delay":[117],"selected":[120],"wordlength,":[121],"Look":[125],"Up":[126],"Table":[127],"(LUT)-based":[128]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}