{"id":"https://openalex.org/W2786428143","doi":"https://doi.org/10.1109/icecs.2017.8292066","title":"Go functional model for a RISC-V asynchronous organisation \u2014 ARV","display_name":"Go functional model for a RISC-V asynchronous organisation \u2014 ARV","publication_year":2017,"publication_date":"2017-12-01","ids":{"openalex":"https://openalex.org/W2786428143","doi":"https://doi.org/10.1109/icecs.2017.8292066","mag":"2786428143"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2017.8292066","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2017.8292066","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084114584","display_name":"Marcos L. L. Sartori","orcid":"https://orcid.org/0000-0003-2166-8870"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Marcos L. L. Sartori","raw_affiliation_strings":["PUCRS-FACIN - Ipiranga Av., 6681 - Porto Alegre - Brazil, 90619-900","PUCRS-FACIN - Ipiranga Av, alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"PUCRS-FACIN - Ipiranga Av., 6681 - Porto Alegre - Brazil, 90619-900","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"PUCRS-FACIN - Ipiranga Av, alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072149252","display_name":"Ney Calazans","orcid":"https://orcid.org/0000-0002-0467-4294"},"institutions":[{"id":"https://openalex.org/I45643870","display_name":"Pontif\u00edcia Universidade Cat\u00f3lica do Rio Grande do Sul","ror":"https://ror.org/025vmq686","country_code":"BR","type":"education","lineage":["https://openalex.org/I45643870"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Ney L. V. Calazans","raw_affiliation_strings":["PUCRS-FACIN - Ipiranga Av., 6681 - Porto Alegre - Brazil, 90619-900","PUCRS-FACIN - Ipiranga Av, alegre, Brazil"],"affiliations":[{"raw_affiliation_string":"PUCRS-FACIN - Ipiranga Av., 6681 - Porto Alegre - Brazil, 90619-900","institution_ids":["https://openalex.org/I45643870"]},{"raw_affiliation_string":"PUCRS-FACIN - Ipiranga Av, alegre, Brazil","institution_ids":["https://openalex.org/I45643870"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5084114584"],"corresponding_institution_ids":["https://openalex.org/I45643870"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.21859745,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"381","last_page":"384"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8902245163917542},{"id":"https://openalex.org/keywords/handshake","display_name":"Handshake","score":0.8514107465744019},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8166912198066711},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.560052216053009},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.5290298461914062},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.510097086429596},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.4997849464416504},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.347675085067749},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.26666098833084106},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14831632375717163}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8902245163917542},{"id":"https://openalex.org/C2778000800","wikidata":"https://www.wikidata.org/wiki/Q830043","display_name":"Handshake","level":3,"score":0.8514107465744019},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8166912198066711},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.560052216053009},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.5290298461914062},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.510097086429596},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.4997849464416504},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.347675085067749},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.26666098833084106},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14831632375717163},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2017.8292066","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2017.8292066","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5600000023841858}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W122486620","https://openalex.org/W220440441","https://openalex.org/W2010800225","https://openalex.org/W2097453879","https://openalex.org/W2150872535","https://openalex.org/W2204863282","https://openalex.org/W2484632353","https://openalex.org/W2487142227","https://openalex.org/W3144368627","https://openalex.org/W4210886820","https://openalex.org/W4211008702","https://openalex.org/W6604992771","https://openalex.org/W6676995014","https://openalex.org/W6722284123","https://openalex.org/W7052324205"],"related_works":["https://openalex.org/W2358991869","https://openalex.org/W4285173741","https://openalex.org/W1486050759","https://openalex.org/W2309292492","https://openalex.org/W2735105689","https://openalex.org/W2140591466","https://openalex.org/W2124260068","https://openalex.org/W2035206467","https://openalex.org/W2512308948","https://openalex.org/W2068921804"],"abstract_inverted_index":{"This":[0],"work":[1],"presents":[2],"ARV,":[3],"an":[4,25],"asynchronous":[5,26,62],"superscalar":[6],"organisation":[7,36,93],"for":[8,28],"the":[9,15,21,55,61,73,81,92],"RISC-V":[10],"architecture.":[11,34],"As":[12],"far":[13],"as":[14,42],"authors":[16],"could":[17],"verify,":[18],"this":[19,29],"is":[20,37],"first":[22],"proposal":[23],"of":[24,64,80,86],"version":[27],"recent":[30],"open":[31],"source":[32],"processor":[33],"The":[35],"modelled":[38],"using":[39,72],"Google's":[40],"Go":[41,49,74],"a":[43,77],"high":[44],"level":[45],"hardware":[46],"description":[47],"language.":[48],"has":[50],"proved":[51],"adequate":[52],"to":[53,89,96],"model":[54,75],"refined":[56],"handshake":[57],"structures":[58],"present":[59],"in":[60],"design":[63,84],"complex":[65],"super-scalar":[66],"structures.":[67],"Preliminary":[68],"performance":[69],"data":[70],"obtained":[71],"enabled":[76],"detailed":[78],"evaluation":[79],"organisation,":[82],"providing":[83],"exploration":[85],"several":[87],"points":[88],"further":[90],"improve":[91],"before":[94],"committing":[95],"its":[97],"implementation":[98],"at":[99],"lower":[100],"abstraction":[101],"levels.":[102]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
