{"id":"https://openalex.org/W2785885988","doi":"https://doi.org/10.1109/icecs.2017.8292047","title":"CAR: On the highway towards de-synchronization","display_name":"CAR: On the highway towards de-synchronization","publication_year":2017,"publication_date":"2017-12-01","ids":{"openalex":"https://openalex.org/W2785885988","doi":"https://doi.org/10.1109/icecs.2017.8292047","mag":"2785885988"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2017.8292047","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2017.8292047","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103138824","display_name":"F. Bertrand","orcid":"https://orcid.org/0000-0003-4837-0425"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Francois Bertrand","raw_affiliation_strings":["CNRS, Grenoble INP\u2021 TIMA, \u2021Institute of Engineering Univ, Grenoble Grenoble Alpes, France","\u2020StarChip\u2014 ArteParc Bat. F, Meyreuil, France","StarChip - StarChip (Arteparc Bat. E, Route de la C\u00f4te d'Azur, 13590 Meyreuil - France)","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet 38031 GRENOBLE Cedex 1 - France)"],"affiliations":[{"raw_affiliation_string":"CNRS, Grenoble INP\u2021 TIMA, \u2021Institute of Engineering Univ, Grenoble Grenoble Alpes, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"\u2020StarChip\u2014 ArteParc Bat. F, Meyreuil, France","institution_ids":[]},{"raw_affiliation_string":"StarChip - StarChip (Arteparc Bat. E, Route de la C\u00f4te d'Azur, 13590 Meyreuil - France)","institution_ids":[]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet 38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110707588","display_name":"Abdelkarim Cherkaoui","orcid":null},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Abdelkarim Cherkaoui","raw_affiliation_strings":["CNRS, Grenoble INP\u2021 TIMA, \u2021Institute of Engineering Univ, Grenoble Grenoble Alpes, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet 38031 GRENOBLE Cedex 1 - France)"],"affiliations":[{"raw_affiliation_string":"CNRS, Grenoble INP\u2021 TIMA, \u2021Institute of Engineering Univ, Grenoble Grenoble Alpes, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet 38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110714624","display_name":"Jean Simatic","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jean Simatic","raw_affiliation_strings":["CNRS, Grenoble INP\u2021 TIMA, \u2021Institute of Engineering Univ, Grenoble Grenoble Alpes, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet 38031 GRENOBLE Cedex 1 - France)"],"affiliations":[{"raw_affiliation_string":"CNRS, Grenoble INP\u2021 TIMA, \u2021Institute of Engineering Univ, Grenoble Grenoble Alpes, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet 38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000734229","display_name":"Anthony Maure","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Anthony Maure","raw_affiliation_strings":["\u2020StarChip\u2014 ArteParc Bat. F, Meyreuil, France","StarChip - StarChip (Arteparc Bat. E, Route de la C\u00f4te d'Azur, 13590 Meyreuil - France)"],"affiliations":[{"raw_affiliation_string":"\u2020StarChip\u2014 ArteParc Bat. F, Meyreuil, France","institution_ids":[]},{"raw_affiliation_string":"StarChip - StarChip (Arteparc Bat. E, Route de la C\u00f4te d'Azur, 13590 Meyreuil - France)","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038428972","display_name":"Laurent Fesquet","orcid":"https://orcid.org/0000-0002-6045-8510"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Laurent Fesquet","raw_affiliation_strings":["CNRS, Grenoble INP\u2021 TIMA, \u2021Institute of Engineering Univ, Grenoble Grenoble Alpes, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet 38031 GRENOBLE Cedex 1 - France)"],"affiliations":[{"raw_affiliation_string":"CNRS, Grenoble INP\u2021 TIMA, \u2021Institute of Engineering Univ, Grenoble Grenoble Alpes, France","institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet 38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5103138824"],"corresponding_institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I4210087012"],"apc_list":null,"apc_paid":null,"fwci":0.437,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.67708607,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"1","issue":null,"first_page":"339","last_page":"343"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.831109881401062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7481334805488586},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6728292107582092},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.6147269606590271},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.5579784512519836},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.5219120979309082},{"id":"https://openalex.org/keywords/jump","display_name":"Jump","score":0.5021276473999023},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4901622235774994},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.4798447787761688},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4771532416343689},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.47386932373046875},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.41309329867362976},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.34388959407806396},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33022627234458923},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.3148431181907654},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.2354239523410797},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.225361168384552},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17960429191589355},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.15776512026786804},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15632978081703186},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.13998454809188843},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1325688362121582}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.831109881401062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7481334805488586},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6728292107582092},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.6147269606590271},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.5579784512519836},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.5219120979309082},{"id":"https://openalex.org/C2780695682","wikidata":"https://www.wikidata.org/wiki/Q4005959","display_name":"Jump","level":2,"score":0.5021276473999023},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4901622235774994},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.4798447787761688},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4771532416343689},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.47386932373046875},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.41309329867362976},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.34388959407806396},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33022627234458923},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.3148431181907654},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.2354239523410797},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.225361168384552},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17960429191589355},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.15776512026786804},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15632978081703186},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.13998454809188843},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1325688362121582},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs.2017.8292047","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2017.8292047","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-01626177v1","is_oa":false,"landing_page_url":"https://hal.science/hal-01626177","pdf_url":null,"source":{"id":"https://openalex.org/S4406922461","display_name":"SPIRE - Sciences Po Institutional REpository","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"24th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec 2017, Batumi, Georgia. pp.339-343, ⟨10.1109/ICECS.2017.8292047⟩","raw_type":"Conference papers"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.800000011920929,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2116229871","https://openalex.org/W2137541450","https://openalex.org/W2160160584","https://openalex.org/W2169222350","https://openalex.org/W2487142227","https://openalex.org/W2528504743","https://openalex.org/W2609541974","https://openalex.org/W4231905827"],"related_works":["https://openalex.org/W1948903516","https://openalex.org/W1993985975","https://openalex.org/W2146990170","https://openalex.org/W2187164010","https://openalex.org/W4312516786","https://openalex.org/W2085028021","https://openalex.org/W2138474603","https://openalex.org/W3094139610","https://openalex.org/W937897205","https://openalex.org/W2380707529"],"abstract_inverted_index":{"Despite":[0],"its":[1],"advantages":[2],"in":[3,20,97],"terms":[4],"of":[5,90],"robustness,":[6],"power":[7,131],"consumption":[8,132],"or":[9],"even":[10],"performances,":[11],"asynchronous":[12,36,55],"design":[13],"struggles":[14],"to":[15,29,46,68,104,121,135],"take":[16],"a":[17,125],"significant":[18],"place":[19],"the":[21,27,31,42,63,82,88,93,100,114],"industry.":[22],"The":[23,65],"required":[24],"step":[25],"by":[26],"designers":[28],"jump":[30],"gap":[32],"between":[33],"synchronous":[34,61],"and":[35,92,129],"circuits":[37,123],"remains":[38],"too":[39],"wide":[40],"for":[41,60],"moment.":[43],"In":[44],"order":[45],"easily":[47],"fullfil":[48],"this":[49,51,112],"gap,":[50],"work":[52],"uses":[53],"an":[54,105,118],"circuit":[56],"class":[57],"almost":[58],"familar":[59],"designers:":[62],"micropipelines.":[64],"proposed":[66,115],"method":[67,94,101,116],"make":[69],"easy":[70,119],"desynchronization":[71],"is":[72,102],"based":[73],"on":[74],"grouping":[75],"registers":[76],"that":[77],"are":[78,95],"inherently":[79],"triggered":[80],"together:":[81],"Concurrently":[83],"Activated":[84],"Registers":[85],"(CAR).":[86],"First,":[87],"context":[89],"utilization":[91],"presented":[96],"details.":[98],"Then":[99],"applied":[103],"Advanced":[106],"Encryption":[107],"Standard":[108],"block":[109],"(AES).":[110],"For":[111],"application,":[113],"exhibits":[117],"way":[120],"desynchronized":[122],"with":[124],"negligible":[126],"area":[127],"overhead":[128],"potential":[130],"reduction":[133],"compared":[134],"previous":[136],"works.":[137]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-28T08:17:26.163206","created_date":"2025-10-10T00:00:00"}