{"id":"https://openalex.org/W2584092232","doi":"https://doi.org/10.1109/icecs.2016.7841227","title":"Semi-automated analog placement","display_name":"Semi-automated analog placement","publication_year":2016,"publication_date":"2016-12-01","ids":{"openalex":"https://openalex.org/W2584092232","doi":"https://doi.org/10.1109/icecs.2016.7841227","mag":"2584092232"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2016.7841227","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2016.7841227","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://hal.science/hal-01484414","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044808512","display_name":"Eric Lao","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210159731","display_name":"Laboratoire de Recherche en Informatique de Paris 6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Eric Lao","raw_affiliation_strings":["Sorbonne Universit\u00e9s-UPMC Univ Paris 06, CNRS Laboratoire d'Informatique de Paris 6 (LIP6), Paris, France","CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)"],"affiliations":[{"raw_affiliation_string":"Sorbonne Universit\u00e9s-UPMC Univ Paris 06, CNRS Laboratoire d'Informatique de Paris 6 (LIP6), Paris, France","institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I39804081","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5105786652","display_name":"Marie-Minerve Lou\u00ebrat","orcid":null},"institutions":[{"id":"https://openalex.org/I4210159731","display_name":"Laboratoire de Recherche en Informatique de Paris 6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Marie-Minerve Louerat","raw_affiliation_strings":["Sorbonne Universit\u00e9s-UPMC Univ Paris 06, CNRS Laboratoire d'Informatique de Paris 6 (LIP6), Paris, France","CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)"],"affiliations":[{"raw_affiliation_string":"Sorbonne Universit\u00e9s-UPMC Univ Paris 06, CNRS Laboratoire d'Informatique de Paris 6 (LIP6), Paris, France","institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I39804081","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5034452195","display_name":"Jean-Paul Chaput","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I4210159731","display_name":"Laboratoire de Recherche en Informatique de Paris 6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jean-Paul Chaput","raw_affiliation_strings":["Sorbonne Universit\u00e9s-UPMC Univ Paris 06, CNRS Laboratoire d'Informatique de Paris 6 (LIP6), Paris, France","LIP6 - Laboratoire d'Informatique de Paris 6 (4 Place JUSSIEU 75252 PARIS CEDEX 05 - France)"],"affiliations":[{"raw_affiliation_string":"Sorbonne Universit\u00e9s-UPMC Univ Paris 06, CNRS Laboratoire d'Informatique de Paris 6 (LIP6), Paris, France","institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I39804081","https://openalex.org/I1294671590"]},{"raw_affiliation_string":"LIP6 - Laboratoire d'Informatique de Paris 6 (4 Place JUSSIEU 75252 PARIS CEDEX 05 - France)","institution_ids":["https://openalex.org/I39804081","https://openalex.org/I4210159731"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5044808512"],"corresponding_institution_ids":["https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159731"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.16515505,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":93},"biblio":{"volume":"28","issue":null,"first_page":"432","last_page":"433"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.7282859683036804},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7164749503135681},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.6553704738616943},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.6203570365905762},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5956135988235474},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5704864859580994},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5454829335212708},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.5423929691314697},{"id":"https://openalex.org/keywords/analog-device","display_name":"Analog device","score":0.445137083530426},{"id":"https://openalex.org/keywords/analog-computer","display_name":"Analog computer","score":0.43255186080932617},{"id":"https://openalex.org/keywords/analog-multiplier","display_name":"Analog multiplier","score":0.422935426235199},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3345809578895569},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32344335317611694},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32021957635879517},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.27123814821243286},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2634827792644501},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.26126280426979065},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21967670321464539},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14933669567108154},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.14453646540641785},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.10190582275390625},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06959116458892822}],"concepts":[{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.7282859683036804},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7164749503135681},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.6553704738616943},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.6203570365905762},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5956135988235474},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5704864859580994},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5454829335212708},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.5423929691314697},{"id":"https://openalex.org/C90711627","wikidata":"https://www.wikidata.org/wiki/Q3742408","display_name":"Analog device","level":4,"score":0.445137083530426},{"id":"https://openalex.org/C90915687","wikidata":"https://www.wikidata.org/wiki/Q63759","display_name":"Analog computer","level":2,"score":0.43255186080932617},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.422935426235199},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3345809578895569},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32344335317611694},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32021957635879517},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.27123814821243286},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2634827792644501},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.26126280426979065},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21967670321464539},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14933669567108154},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.14453646540641785},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.10190582275390625},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06959116458892822},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs.2016.7841227","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2016.7841227","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-01484414v1","is_oa":true,"landing_page_url":"https://hal.science/hal-01484414","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec 2016, Monte Carlo, Monaco. pp.432 - 433, &#x27E8;10.1109/ICECS.2016.7841227&#x27E9;","raw_type":"Conference papers"}],"best_oa_location":{"id":"pmh:oai:HAL:hal-01484414v1","is_oa":true,"landing_page_url":"https://hal.science/hal-01484414","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS), Dec 2016, Monte Carlo, Monaco. pp.432 - 433, &#x27E8;10.1109/ICECS.2016.7841227&#x27E9;","raw_type":"Conference papers"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2024060531","https://openalex.org/W2070430590","https://openalex.org/W2141019759","https://openalex.org/W2295569708","https://openalex.org/W2891819607","https://openalex.org/W6680965115"],"related_works":["https://openalex.org/W1811311421","https://openalex.org/W1987033534","https://openalex.org/W2889983699","https://openalex.org/W2068211053","https://openalex.org/W2162498702","https://openalex.org/W2108147958","https://openalex.org/W4234945196","https://openalex.org/W312551755","https://openalex.org/W266385999","https://openalex.org/W4240836542"],"abstract_inverted_index":{"Analog":[0],"design":[1,49],"remains":[2],"a":[3,34,37,56,71],"manual":[4],"task":[5],"because":[6],"of":[7,10,80],"the":[8,11,26,47,62,78],"complexity":[9],"interactions":[12],"among":[13],"devices.":[14],"Automation":[15],"tools":[16],"dedicated":[17],"to":[18,54,70],"analog":[19,48,58],"circuits":[20],"are":[21],"not":[22],"as":[23,25],"mature":[24],"digital":[27,72],"automation":[28],"ones,":[29],"but":[30],"have":[31],"been":[32],"improved":[33],"lot":[35],"at":[36,43,83],"point":[38],"that":[39],"they":[40],"can":[41],"help":[42],"individual":[44],"steps":[45],"in":[46,67],"flow.":[50],"Our":[51],"approach":[52],"is":[53],"propose":[55],"semi-automated":[57],"placement":[59],"controlled":[60],"by":[61],"designer,":[63],"following":[64],"an":[65],"organization":[66],"row":[68],"similar":[69],"circuit":[73],"structure.":[74],"The":[75],"results":[76],"show":[77],"ability":[79],"our":[81],"tool":[82],"generating":[84],"multiple":[85],"layouts":[86],"respecting":[87],"designer's":[88],"constraints.":[89]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2026-03-10T16:38:18.471706","created_date":"2025-10-10T00:00:00"}
