{"id":"https://openalex.org/W2585884049","doi":"https://doi.org/10.1109/icecs.2016.7841129","title":"A 0.45V continuous time-domain filter using asynchronous oscillator structures","display_name":"A 0.45V continuous time-domain filter using asynchronous oscillator structures","publication_year":2016,"publication_date":"2016-12-01","ids":{"openalex":"https://openalex.org/W2585884049","doi":"https://doi.org/10.1109/icecs.2016.7841129","mag":"2585884049"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2016.7841129","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2016.7841129","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049971628","display_name":"Lieuwe B. Leene","orcid":"https://orcid.org/0000-0002-6899-2662"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Lieuwe B. Leene","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Imperial College, London, UK"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Imperial College, London, UK","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017596402","display_name":"Timothy G. Constandinou","orcid":"https://orcid.org/0000-0001-9778-1162"},"institutions":[{"id":"https://openalex.org/I4210109636","display_name":"NIHR Imperial Biomedical Research Centre","ror":"https://ror.org/01kmhx639","country_code":"GB","type":"facility","lineage":["https://openalex.org/I34931013","https://openalex.org/I4210109636"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Timothy G. Constandinou","raw_affiliation_strings":["Imperial College, Institute of Biomedical Engineering, London, UK"],"affiliations":[{"raw_affiliation_string":"Imperial College, Institute of Biomedical Engineering, London, UK","institution_ids":["https://openalex.org/I4210109636"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5049971628"],"corresponding_institution_ids":["https://openalex.org/I47508984"],"apc_list":null,"apc_paid":null,"fwci":0.1749,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.60349781,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"49","last_page":"52"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6824309229850769},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6504421234130859},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5737278461456299},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5365018844604492},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5361774563789368},{"id":"https://openalex.org/keywords/time-domain","display_name":"Time domain","score":0.49809861183166504},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.44280707836151123},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4275745749473572},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4222908020019531},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.38544562458992004},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2500803768634796},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21072998642921448},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16642454266548157},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10608106851577759}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6824309229850769},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6504421234130859},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5737278461456299},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5365018844604492},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5361774563789368},{"id":"https://openalex.org/C103824480","wikidata":"https://www.wikidata.org/wiki/Q185889","display_name":"Time domain","level":2,"score":0.49809861183166504},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.44280707836151123},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4275745749473572},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4222908020019531},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.38544562458992004},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2500803768634796},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21072998642921448},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16642454266548157},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10608106851577759},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs.2016.7841129","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2016.7841129","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:spiral.imperial.ac.uk:10044/1/44154","is_oa":false,"landing_page_url":"http://hdl.handle.net/10044/1/44154","pdf_url":null,"source":{"id":"https://openalex.org/S4306401396","display_name":"Spiral (Imperial College London)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I47508984","host_organization_name":"Imperial College London","host_organization_lineage":["https://openalex.org/I47508984"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE International Conference on Electronics, Circuits and Systems (ICECS)","raw_type":"Conference Paper"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6100000143051147}],"awards":[{"id":"https://openalex.org/G5927148474","display_name":null,"funder_award_id":"EP/K015060/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"},{"id":"https://openalex.org/G6855896970","display_name":null,"funder_award_id":"EP/M020975/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1914462576","https://openalex.org/W1981463101","https://openalex.org/W2050684723","https://openalex.org/W2055770207","https://openalex.org/W2061560738","https://openalex.org/W2066274011","https://openalex.org/W2075648624","https://openalex.org/W2097579177","https://openalex.org/W2104340505","https://openalex.org/W2125010820","https://openalex.org/W2144959075","https://openalex.org/W2298256378","https://openalex.org/W2340265561","https://openalex.org/W2460688588"],"related_works":["https://openalex.org/W4210376836","https://openalex.org/W4210925376","https://openalex.org/W1633995705","https://openalex.org/W2596211269","https://openalex.org/W2360384790","https://openalex.org/W4232397253","https://openalex.org/W4235913033","https://openalex.org/W2109284253","https://openalex.org/W2039966832","https://openalex.org/W2359819289"],"abstract_inverted_index":{"This":[0,78],"paper":[1],"presents":[2],"a":[3,24,29,83,109],"novel":[4],"oscillator":[5],"based":[6],"filter":[7,87],"structure":[8],"for":[9,32],"processing":[10,35],"time-domain":[11,54],"signals":[12,40],"with":[13,108],"linear":[14,73],"dynamics":[15],"that":[16,41,56],"extensively":[17],"uses":[18],"digital":[19],"logic":[20],"by":[21,81],"construction.":[22],"Such":[23],"mixed":[25,66],"signal":[26,67],"topology":[27],"is":[28,50,79],"key":[30],"component":[31],"allowing":[33],"efficient":[34],"of":[36,103,111,117],"asynchronous":[37],"time":[38],"encoded":[39],"does":[42],"not":[43],"necessitate":[44],"external":[45],"clocking.":[46],"A":[47],"miniaturized":[48],"primitive":[49],"introduced":[51],"as":[52],"analogue":[53],"memory":[55],"can":[57],"be":[58],"modelled,":[59],"synthesized,":[60],"and":[61],"incorporated":[62],"in":[63,92,123],"closed":[64],"loop":[65],"accelerators":[68],"to":[69],"realize":[70],"more":[71],"complex":[72],"or":[74],"non-linear":[75],"computational":[76],"systems.":[77],"contextualized":[80],"demonstrating":[82],"compact":[84],"low":[85],"power":[86],"operating":[88],"at":[89],"0.45":[90],"V":[91],"65":[93],"nm":[94],"CMOS.":[95,125],"Simulation":[96],"results":[97],"are":[98],"presented":[99],"showing":[100],"an":[101,115],"excess":[102],"50":[104],"dB":[105],"dynamic":[106],"range":[107],"FOM":[110],"7fJ/pole":[112],"which":[113],"promises":[114],"order":[116],"magnitude":[118],"improvement":[119],"on":[120],"state-of-the-art":[121],"filters":[122],"nanometre":[124]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}