{"id":"https://openalex.org/W2038833548","doi":"https://doi.org/10.1109/icecs.2013.6815459","title":"MogaMap: An application of multi-objective genetic algorithm for LUT-based FPGA technology mapping","display_name":"MogaMap: An application of multi-objective genetic algorithm for LUT-based FPGA technology mapping","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2038833548","doi":"https://doi.org/10.1109/icecs.2013.6815459","mag":"2038833548"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2013.6815459","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2013.6815459","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087683405","display_name":"Victor L. F. Souza","orcid":"https://orcid.org/0000-0001-8195-6140"},"institutions":[{"id":"https://openalex.org/I25112270","display_name":"Universidade Federal de Pernambuco","ror":"https://ror.org/047908t24","country_code":"BR","type":"education","lineage":["https://openalex.org/I25112270"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"V. L. Souza","raw_affiliation_strings":["Informatics Center (CIn), Federal University of Pernambuco (UFPE), Recife, Brasil","Informatics Center (CIN), Federal University of Pernambuco (UFPE), Recife, Brasil"],"affiliations":[{"raw_affiliation_string":"Informatics Center (CIn), Federal University of Pernambuco (UFPE), Recife, Brasil","institution_ids":["https://openalex.org/I25112270"]},{"raw_affiliation_string":"Informatics Center (CIN), Federal University of Pernambuco (UFPE), Recife, Brasil","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062002234","display_name":"Abel Guilhermino da Silva Filho","orcid":"https://orcid.org/0000-0002-7876-2756"},"institutions":[{"id":"https://openalex.org/I25112270","display_name":"Universidade Federal de Pernambuco","ror":"https://ror.org/047908t24","country_code":"BR","type":"education","lineage":["https://openalex.org/I25112270"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"A. G. Silva-Filho","raw_affiliation_strings":["Informatics Center (CIn), Federal University of Pernambuco (UFPE), Recife, Brasil","Informatics Center (CIN), Federal University of Pernambuco (UFPE), Recife, Brasil"],"affiliations":[{"raw_affiliation_string":"Informatics Center (CIn), Federal University of Pernambuco (UFPE), Recife, Brasil","institution_ids":["https://openalex.org/I25112270"]},{"raw_affiliation_string":"Informatics Center (CIN), Federal University of Pernambuco (UFPE), Recife, Brasil","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5087683405"],"corresponding_institution_ids":["https://openalex.org/I25112270"],"apc_list":null,"apc_paid":null,"fwci":0.20656357,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.60672873,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"485","last_page":"488"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10848","display_name":"Advanced Multi-Objective Optimization Algorithms","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.9111208319664001},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8108382821083069},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7574409246444702},{"id":"https://openalex.org/keywords/cluster-analysis","display_name":"Cluster analysis","score":0.65630704164505},{"id":"https://openalex.org/keywords/genetic-algorithm","display_name":"Genetic algorithm","score":0.6514782905578613},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.6435325145721436},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.5906330347061157},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.5071027278900146},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.49708130955696106},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4576018154621124},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.4542768597602844},{"id":"https://openalex.org/keywords/fitness-function","display_name":"Fitness function","score":0.4140980541706085},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.27746498584747314},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.15328818559646606},{"id":"https://openalex.org/keywords/data-mining","display_name":"Data mining","score":0.11910119652748108},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10050055384635925},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.07839027047157288},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.06274211406707764}],"concepts":[{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.9111208319664001},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8108382821083069},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7574409246444702},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.65630704164505},{"id":"https://openalex.org/C8880873","wikidata":"https://www.wikidata.org/wiki/Q187787","display_name":"Genetic algorithm","level":2,"score":0.6514782905578613},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.6435325145721436},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.5906330347061157},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.5071027278900146},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.49708130955696106},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4576018154621124},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.4542768597602844},{"id":"https://openalex.org/C176066374","wikidata":"https://www.wikidata.org/wiki/Q629118","display_name":"Fitness function","level":3,"score":0.4140980541706085},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.27746498584747314},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.15328818559646606},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.11910119652748108},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10050055384635925},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.07839027047157288},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.06274211406707764},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2013.6815459","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2013.6815459","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1967128905","https://openalex.org/W1977850862","https://openalex.org/W1985457698","https://openalex.org/W2111756578","https://openalex.org/W2126105956","https://openalex.org/W2126814059","https://openalex.org/W2133784609","https://openalex.org/W2137972166","https://openalex.org/W2138383740","https://openalex.org/W2139766156","https://openalex.org/W2150787480","https://openalex.org/W2151506404","https://openalex.org/W2155316178","https://openalex.org/W2155764480","https://openalex.org/W2167159964"],"related_works":["https://openalex.org/W2117300767","https://openalex.org/W2024574431","https://openalex.org/W2131696304","https://openalex.org/W2374017528","https://openalex.org/W4285503609","https://openalex.org/W2126248441","https://openalex.org/W2106492215","https://openalex.org/W2326694407","https://openalex.org/W2082859007","https://openalex.org/W2164831575"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"present":[4],"MogaMap,":[5],"an":[6],"algorithm":[7,16],"based":[8],"on":[9,54],"pre-selection":[10],"of":[11,21],"cuts":[12],"and":[13,83],"multiobjective":[14],"genetic":[15],"to":[17,41,60,76],"solve":[18],"the":[19,38,43,47,62,69],"problem":[20],"Look-Up":[22],"Table":[23],"(LUT)":[24],"Technology":[25],"Mapping":[26],"for":[27,81],"FPGA.":[28,48],"Besides":[29],"that,":[30,53],"a":[31],"new":[32],"cost":[33],"function":[34],"is":[35,58],"proposed":[36],"in":[37,85],"clustering":[39],"phase":[40],"reduce":[42,61],"energy":[44,70],"consumption":[45,71],"within":[46],"The":[49],"simulation":[50],"results":[51],"show":[52],"average,":[55],"our":[56],"technique":[57],"able":[59],"critical":[63],"path":[64],"by":[65,72],"35%":[66],"while":[67],"reduces":[68],"8%":[73],"when":[74],"compared":[75],"WireMap":[77],"with":[78],"toggle":[79],"optimization":[80],"area":[82],"AAPack":[84],"VTR":[86],"flow.":[87]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}