{"id":"https://openalex.org/W2014732664","doi":"https://doi.org/10.1109/icecs.2012.6463792","title":"Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs","display_name":"Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W2014732664","doi":"https://doi.org/10.1109/icecs.2012.6463792","mag":"2014732664"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2012.6463792","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2012.6463792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016144967","display_name":"Ahmed Mahdi","orcid":"https://orcid.org/0000-0003-3547-6757"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"A. Mahdi","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Patras, Patras, Greece","Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103155608","display_name":"P. Sakellariou","orcid":"https://orcid.org/0000-0002-6481-1844"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"P. Sakellariou","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Patras, Patras, Greece","Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073972617","display_name":"Nikos Kanistras","orcid":"https://orcid.org/0000-0002-7337-1107"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"N. Kanistras","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Patras, Patras, Greece","Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074438686","display_name":"I. Tsatsaragkos","orcid":"https://orcid.org/0000-0001-8297-7277"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"I. Tsatsaragkos","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Patras, Patras, Greece","Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021252086","display_name":"Vassilis Paliouras","orcid":"https://orcid.org/0000-0002-1414-7500"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"V. Paliouras","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of Patras, Patras, Greece","Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]},{"raw_affiliation_string":"Electr. & Comput. Eng. Dept., Univ. of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5016144967"],"corresponding_institution_ids":["https://openalex.org/I174878644"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12262355,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"89","last_page":"92"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8117907047271729},{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.7620733976364136},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.7366870641708374},{"id":"https://openalex.org/keywords/gigabit","display_name":"Gigabit","score":0.6567431688308716},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.5943509936332703},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.5779469609260559},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5718204975128174},{"id":"https://openalex.org/keywords/forward-error-correction","display_name":"Forward error correction","score":0.5372758507728577},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.5301694869995117},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4399334490299225},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43113037943840027},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.41642487049102783},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3916531503200531},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3785504102706909},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.16117540001869202},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.088593989610672}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8117907047271729},{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.7620733976364136},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.7366870641708374},{"id":"https://openalex.org/C21922175","wikidata":"https://www.wikidata.org/wiki/Q3105497","display_name":"Gigabit","level":2,"score":0.6567431688308716},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.5943509936332703},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.5779469609260559},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5718204975128174},{"id":"https://openalex.org/C202932441","wikidata":"https://www.wikidata.org/wiki/Q55611017","display_name":"Forward error correction","level":3,"score":0.5372758507728577},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.5301694869995117},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4399334490299225},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43113037943840027},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.41642487049102783},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3916531503200531},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3785504102706909},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.16117540001869202},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.088593989610672}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2012.6463792","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2012.6463792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4300000071525574}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1964884229","https://openalex.org/W1966085625","https://openalex.org/W2070175323","https://openalex.org/W2128765501"],"related_works":["https://openalex.org/W2623918504","https://openalex.org/W2957709805","https://openalex.org/W2916248738","https://openalex.org/W1968720239","https://openalex.org/W4387475406","https://openalex.org/W2622922565","https://openalex.org/W2100531868","https://openalex.org/W2124455219","https://openalex.org/W2121747124","https://openalex.org/W2011630204"],"abstract_inverted_index":{"Contemporary":[0],"and":[1,5,41,78,148],"next-generation":[2],"wireless,":[3],"wired":[4],"optical":[6],"telecommunication":[7],"systems":[8,49],"rely":[9],"on":[10,183],"sophisticated":[11],"forward":[12],"error-correction":[13],"(FEC)":[14],"schemes":[15],"to":[16,114,120,131,176],"facilitate":[17,115],"operation":[18,125,134,155],"at":[19,90,126,161,190],"particularly":[20],"low":[21,91,127,162],"Bit":[22],"Error":[23],"Rate":[24],"(BER).":[25],"The":[26,53],"ever":[27],"increasing":[28],"demand":[29],"for":[30,38],"high":[31],"information":[32],"throughput":[33],"rate,":[34],"combined":[35],"with":[36,103],"requirements":[37],"moderate":[39],"cost":[40],"low-power":[42],"operation,":[43],"renders":[44],"the":[45,56,72,76,79,84,87,165],"design":[46,146],"of":[47,55,60,75,86,124,135,154,156,181],"FEC":[48,159],"a":[50,65,94,141,157,184],"challenging":[51],"task.":[52],"definition":[54],"parity":[57],"check":[58],"matrix":[59],"an":[61],"LDPC":[62],"code":[63,89,116,121],"is":[64,93,170],"crucial":[66],"task":[67,97],"as":[68],"it":[69],"defines":[70],"both":[71],"computational":[73],"complexity":[74],"decoder":[77],"error":[80],"correction":[81],"capabilities.":[82],"However,":[83],"characterization":[85],"corresponding":[88],"BER":[92,128],"computationally":[95],"intensive":[96],"that":[98,110,151,172],"cannot":[99],"be":[100,194],"carried":[101],"out":[102],"software":[104],"simulation.":[105],"We":[106],"here":[107],"demonstrate":[108],"procedures":[109],"involve":[111],"hardware":[112],"acceleration":[113],"design.":[117],"In":[118],"addition":[119],"design,":[122],"verification":[123,149],"requires":[129],"strategies":[130,150],"prove":[132],"correct":[133],"hardware,":[136],"thus":[137],"rendering":[138],"FPGA":[139],"prototyping":[140],"necessity.":[142],"This":[143],"paper":[144],"demonstrates":[145],"techniques":[147],"allow":[152],"proof":[153],"gigabit-rate":[158],"system":[160],"BER,":[163],"exploiting":[164],"state-of-the-art":[166],"Virtex-7":[167,185],"technology.":[168],"It":[169],"shown":[171],"by":[173],"occupying":[174],"up":[175],"70%":[177],"-":[178],"80%":[179],"percent":[180],"slices":[182],"XC7V485T":[186],"device,":[187],"iterative":[188],"decoding":[189],"gigabit":[191],"rate":[192],"can":[193],"verified.":[195]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
