{"id":"https://openalex.org/W2050608370","doi":"https://doi.org/10.1109/icecs.2012.6463633","title":"Flip-flop design using novel pulse generation technique","display_name":"Flip-flop design using novel pulse generation technique","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W2050608370","doi":"https://doi.org/10.1109/icecs.2012.6463633","mag":"2050608370"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2012.6463633","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2012.6463633","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043716992","display_name":"Farshad Moradi","orcid":"https://orcid.org/0000-0001-7077-8545"},"institutions":[{"id":"https://openalex.org/I204337017","display_name":"Aarhus University","ror":"https://ror.org/01aj84f44","country_code":"DK","type":"education","lineage":["https://openalex.org/I204337017"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Farshad Moradi","raw_affiliation_strings":["Integrated Circuits and Electronics Laboratory (ICELAB), Department of Engineering, Aarhus University, Denmark","Department of Engineering, Aarhus University, Aarhus, Denmark"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Circuits and Electronics Laboratory (ICELAB), Department of Engineering, Aarhus University, Denmark","institution_ids":["https://openalex.org/I204337017"]},{"raw_affiliation_string":"Department of Engineering, Aarhus University, Aarhus, Denmark","institution_ids":["https://openalex.org/I204337017"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081565415","display_name":"Dag T. Wisland","orcid":"https://orcid.org/0000-0002-3678-3946"},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Dag Wisland","raw_affiliation_strings":["Nanoelectronic group, Institute of Informatics, University of Oslo, Norway","Nanoelectronic group, Univ. of Oslo, Oslo, Norway"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanoelectronic group, Institute of Informatics, University of Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"Nanoelectronic group, Univ. of Oslo, Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100862700","display_name":"Jens Kargaard Madsen","orcid":null},"institutions":[{"id":"https://openalex.org/I204337017","display_name":"Aarhus University","ror":"https://ror.org/01aj84f44","country_code":"DK","type":"education","lineage":["https://openalex.org/I204337017"]}],"countries":["DK"],"is_corresponding":false,"raw_author_name":"Jens Kargaard Madsen","raw_affiliation_strings":["Integrated Circuits and Electronics Laboratory (ICELAB), Department of Engineering, Aarhus University, Denmark","Department of Engineering, Aarhus University, Aarhus, Denmark"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Integrated Circuits and Electronics Laboratory (ICELAB), Department of Engineering, Aarhus University, Denmark","institution_ids":["https://openalex.org/I204337017"]},{"raw_affiliation_string":"Department of Engineering, Aarhus University, Aarhus, Denmark","institution_ids":["https://openalex.org/I204337017"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066983905","display_name":"Hamid Mahmoodi","orcid":"https://orcid.org/0000-0003-4237-3086"},"institutions":[{"id":"https://openalex.org/I71838634","display_name":"San Francisco State University","ror":"https://ror.org/05ykr0121","country_code":"US","type":"education","lineage":["https://openalex.org/I71838634"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hamid Mahmoodi","raw_affiliation_strings":["NeCRL group, San Francisco State University, USA","NeCRL group, San Francisco State Univ., San Francisco, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NeCRL group, San Francisco State University, USA","institution_ids":["https://openalex.org/I71838634"]},{"raw_affiliation_string":"NeCRL group, San Francisco State Univ., San Francisco, CA, USA","institution_ids":["https://openalex.org/I71838634"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"14","issue":null,"first_page":"685","last_page":"688"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.8973879814147949},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6287164688110352},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6266977190971375},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.6050071120262146},{"id":"https://openalex.org/keywords/cadence","display_name":"Cadence","score":0.5634621381759644},{"id":"https://openalex.org/keywords/pulse-generator","display_name":"Pulse generator","score":0.5058152675628662},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5037400126457214},{"id":"https://openalex.org/keywords/ibm","display_name":"IBM","score":0.5011265277862549},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.45615166425704956},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.449348509311676},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.44884711503982544},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.329241544008255},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32655030488967896},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2537623941898346},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.12775075435638428},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.09257277846336365}],"concepts":[{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.8973879814147949},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6287164688110352},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6266977190971375},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.6050071120262146},{"id":"https://openalex.org/C2777125575","wikidata":"https://www.wikidata.org/wiki/Q14088448","display_name":"Cadence","level":2,"score":0.5634621381759644},{"id":"https://openalex.org/C51319974","wikidata":"https://www.wikidata.org/wiki/Q3509564","display_name":"Pulse generator","level":3,"score":0.5058152675628662},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5037400126457214},{"id":"https://openalex.org/C70388272","wikidata":"https://www.wikidata.org/wiki/Q5968558","display_name":"IBM","level":2,"score":0.5011265277862549},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.45615166425704956},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.449348509311676},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.44884711503982544},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.329241544008255},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32655030488967896},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2537623941898346},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.12775075435638428},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.09257277846336365},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/icecs.2012.6463633","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2012.6463633","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.atira.dk:publications/1d855faf-9077-4ec6-b69a-14023325ede8","is_oa":false,"landing_page_url":"https://pure.au.dk/portal/en/publications/1d855faf-9077-4ec6-b69a-14023325ede8","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Moradi, F, Wisland, D, Madsen, J K & Mahmoodi, H 2012, 'Flip-Flop Design Using Novel Pulse Generation Technique', Paper presented at IEEE International Conference on Electronics, Circuits, and Systems, Sevilla, Spain, 09/12/2012 - 12/12/2012. < http://www.ieee-icecs2012.org/index.php >","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:pure.atira.dk:publications/858186c1-99f1-467c-9b0d-3cd445c5e497","is_oa":false,"landing_page_url":"https://pure.au.dk/portal/en/publications/858186c1-99f1-467c-9b0d-3cd445c5e497","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Moradi, F, Wisland, D T D T, Kargaard Madsen, J J & Mahmoodi, H H 2012, Flip-flop design using novel pulse generation technique. in 2012 19th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2012. pp. 685-688. https://doi.org/10.1109/ICECS.2012.6463633","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1495418540","https://openalex.org/W1539883310","https://openalex.org/W1556319557","https://openalex.org/W1633471522","https://openalex.org/W1876288589","https://openalex.org/W1899064893","https://openalex.org/W2019198721","https://openalex.org/W2067168777","https://openalex.org/W2095703308","https://openalex.org/W2109769819","https://openalex.org/W2121878622","https://openalex.org/W2137616964","https://openalex.org/W2150268598","https://openalex.org/W2161339729","https://openalex.org/W2166243422","https://openalex.org/W2169263481","https://openalex.org/W2170265438"],"related_works":["https://openalex.org/W4289538008","https://openalex.org/W3186427148","https://openalex.org/W2138282914","https://openalex.org/W2065850627","https://openalex.org/W4404325012","https://openalex.org/W2017012638","https://openalex.org/W2071885361","https://openalex.org/W1966793535","https://openalex.org/W1964447062","https://openalex.org/W2088265144"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"new":[3],"flip-flop":[4,30,54],"topologies":[5,55],"for":[6,29,100],"low":[7],"power":[8,65,85],"and":[9,45,66,104],"high-speed":[10],"digital":[11],"designs":[12],"are":[13,98],"presented.":[14],"A":[15],"novel":[16],"technique":[17,33,63],"is":[18,50,87],"used":[19,99],"to":[20,38,52,56,76],"generate":[21],"a":[22],"special":[23],"clock-pulse":[24],"wave":[25],"(internally":[26],"or":[27],"externally)":[28],"circuits.":[31],"This":[32],"shows":[34],"better":[35],"characteristics":[36],"compared":[37,75],"existing":[39],"techniques":[40],"in":[41,72,84],"terms":[42],"of":[43,60],"delay":[44],"power.":[46],"The":[47],"generated":[48],"pulse":[49],"applied":[51],"different":[53],"show":[57,70],"the":[58,61,91],"efficacy":[59],"proposed":[62,92],"on":[64],"speed.":[67],"Simulation":[68],"results":[69],"improvement":[71,83],"setup":[73],"time":[74],"their":[77],"counterparts.":[78],"Furthermore,":[79],"at":[80],"least":[81],"20%":[82],"consumption":[86],"observed":[88],"by":[89],"utilizing":[90],"pulse-generator":[93],"technique.":[94],"IBM":[95],"65nm":[96],"Models":[97],"simulation":[101],"using":[102],"CADENCE":[103],"Synopsys":[105],"tools.":[106]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
