{"id":"https://openalex.org/W1973158882","doi":"https://doi.org/10.1109/icecs.2012.6463547","title":"A monitoring infrastructure for FPGA self-awareness and dynamic adaptation","display_name":"A monitoring infrastructure for FPGA self-awareness and dynamic adaptation","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W1973158882","doi":"https://doi.org/10.1109/icecs.2012.6463547","mag":"1973158882"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2012.6463547","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2012.6463547","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082297469","display_name":"Carlos Osuna","orcid":"https://orcid.org/0000-0002-9896-9957"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Carlos Gomez Osuna","raw_affiliation_strings":["Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain"],"affiliations":[{"raw_affiliation_string":"Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018687338","display_name":"Miguel \u00c1ngel S\u00e1nchez Marcos","orcid":null},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Miguel Angel Sanchez Marcos","raw_affiliation_strings":["Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain"],"affiliations":[{"raw_affiliation_string":"Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068231777","display_name":"Pablo Ituero","orcid":"https://orcid.org/0000-0001-6448-7936"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pablo Ituero","raw_affiliation_strings":["Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain"],"affiliations":[{"raw_affiliation_string":"Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045572211","display_name":"Marisa L\u00f3pez\u2010Vallejo","orcid":"https://orcid.org/0000-0002-3833-524X"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Marisa Lopez-Vallejo","raw_affiliation_strings":["Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain"],"affiliations":[{"raw_affiliation_string":"Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045572211","display_name":"Marisa L\u00f3pez\u2010Vallejo","orcid":"https://orcid.org/0000-0002-3833-524X"},"institutions":[{"id":"https://openalex.org/I88060688","display_name":"Universidad Polit\u00e9cnica de Madrid","ror":"https://ror.org/03n6nwv02","country_code":"ES","type":"education","lineage":["https://openalex.org/I88060688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Marisa L\u00f3pez-Vallejo","raw_affiliation_strings":["Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain"],"affiliations":[{"raw_affiliation_string":"Dpto. de Ingenier\u00eda Electr\u00f3nica, Universidad Polit\u00e9cnica de Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]},{"raw_affiliation_string":"Dipt. de Ing. Electron., Univ. Politec. de Madrid, Madrid, Spain","institution_ids":["https://openalex.org/I88060688"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5082297469"],"corresponding_institution_ids":["https://openalex.org/I88060688"],"apc_list":null,"apc_paid":null,"fwci":0.7365,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.72566226,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"8","issue":null,"first_page":"765","last_page":"768"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8417114615440369},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6987521648406982},{"id":"https://openalex.org/keywords/adaptation","display_name":"Adaptation (eye)","score":0.6695638298988342},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5531041026115417},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.5529706478118896},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4530493915081024},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.44186538457870483},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.33804023265838623},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20911678671836853}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8417114615440369},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6987521648406982},{"id":"https://openalex.org/C139807058","wikidata":"https://www.wikidata.org/wiki/Q352374","display_name":"Adaptation (eye)","level":2,"score":0.6695638298988342},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5531041026115417},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.5529706478118896},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4530493915081024},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.44186538457870483},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.33804023265838623},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20911678671836853},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2012.6463547","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2012.6463547","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.550000011920929,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1693570377","https://openalex.org/W2055871419","https://openalex.org/W2065549026","https://openalex.org/W2073345455","https://openalex.org/W2096227207","https://openalex.org/W2099320289","https://openalex.org/W2110092336","https://openalex.org/W2123355738","https://openalex.org/W2127379989","https://openalex.org/W2144809715"],"related_works":["https://openalex.org/W2998132311","https://openalex.org/W2207067480","https://openalex.org/W4383823603","https://openalex.org/W2332075903","https://openalex.org/W1579891439","https://openalex.org/W2291257309","https://openalex.org/W2082487009","https://openalex.org/W272033699","https://openalex.org/W1692883217","https://openalex.org/W2406926880"],"abstract_inverted_index":{"Variabilities":[0],"associated":[1],"with":[2],"CMOS":[3],"evolution":[4],"affect":[5],"the":[6,52,76,103,111],"yield":[7],"and":[8,22,40,66,109,122],"performance":[9],"of":[10,24,43,54,64,79,94],"current":[11],"digital":[12,25],"designs.":[13],"FPGAs,":[14],"which":[15],"are":[16],"widely":[17],"used":[18],"for":[19],"fast":[20],"prototyping":[21],"implementation":[23],"circuits,":[26],"also":[27,101],"suffer":[28],"from":[29],"these":[30,44,48],"issues.":[31],"Proactive":[32],"approaches":[33],"start":[34],"to":[35,37,71,107],"appear":[36],"achieve":[38],"self-awareness":[39],"dynamic":[41],"adaptation":[42],"devices.":[45],"To":[46],"support":[47],"techniques":[49],"we":[50],"propose":[51],"employment":[53],"a":[55,86],"multi-purpose":[56],"sensor":[57],"network.":[58],"This":[59,82],"infrastructure,":[60],"through":[61],"adequate":[62],"use":[63],"configuration":[65],"automation":[67],"tools,":[68],"is":[69,83],"able":[70],"obtain":[72],"relevant":[73],"data":[74],"along":[75],"life":[77],"cycle":[78],"an":[80],"FPGA.":[81],"realised":[84],"at":[85],"very":[87],"reduced":[88],"cost,":[89],"not":[90],"only":[91],"in":[92,125],"terms":[93],"area":[95],"or":[96],"other":[97],"limited":[98],"resources,":[99],"but":[100],"regarding":[102],"design":[104],"effort":[105],"required":[106],"define":[108],"deploy":[110],"measuring":[112,120],"infrastructure.":[113],"Our":[114],"proposal":[115],"has":[116],"been":[117],"validated":[118],"by":[119],"inter-die":[121],"intra-die":[123],"variability":[124],"different":[126],"FPGA":[127],"families.":[128]},"counts_by_year":[{"year":2024,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}