{"id":"https://openalex.org/W1990996078","doi":"https://doi.org/10.1109/icecs.2012.6463538","title":"A dead-zone free and linearized digital PLL","display_name":"A dead-zone free and linearized digital PLL","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W1990996078","doi":"https://doi.org/10.1109/icecs.2012.6463538","mag":"1990996078"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2012.6463538","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2012.6463538","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088006064","display_name":"Amer Samarah","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Amer Samarah","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada","Edward S. Rogers Sr.Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"Edward S. Rogers Sr.Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010704016","display_name":"Anthony Chan Carusone","orcid":"https://orcid.org/0000-0002-0977-7516"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Anthony Chan Carusone","raw_affiliation_strings":["Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada","Edward S. Rogers Sr.Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada","institution_ids":["https://openalex.org/I185261750"]},{"raw_affiliation_string":"Edward S. Rogers Sr.Dept. of Electr. & Comput. Eng., Univ. of Toronto, Toronto, ON, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5088006064"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":0.491,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.66864776,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"56","issue":null,"first_page":"801","last_page":"804"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dpll-algorithm","display_name":"DPLL algorithm","score":0.8794092535972595},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8399129509925842},{"id":"https://openalex.org/keywords/dead-zone","display_name":"Dead zone","score":0.7697837352752686},{"id":"https://openalex.org/keywords/spurious-relationship","display_name":"Spurious relationship","score":0.6217004060745239},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.5819900035858154},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.566748321056366},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.5219009518623352},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.5013895034790039},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.49968767166137695},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49440884590148926},{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.482599139213562},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4286229610443115},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23386985063552856},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.17584511637687683}],"concepts":[{"id":"https://openalex.org/C143936061","wikidata":"https://www.wikidata.org/wiki/Q2030088","display_name":"DPLL algorithm","level":4,"score":0.8794092535972595},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8399129509925842},{"id":"https://openalex.org/C63840607","wikidata":"https://www.wikidata.org/wiki/Q1236263","display_name":"Dead zone","level":2,"score":0.7697837352752686},{"id":"https://openalex.org/C97256817","wikidata":"https://www.wikidata.org/wiki/Q1462316","display_name":"Spurious relationship","level":2,"score":0.6217004060745239},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.5819900035858154},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.566748321056366},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.5219009518623352},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.5013895034790039},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.49968767166137695},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49440884590148926},{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.482599139213562},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4286229610443115},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23386985063552856},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.17584511637687683},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C111368507","wikidata":"https://www.wikidata.org/wiki/Q43518","display_name":"Oceanography","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2012.6463538","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2012.6463538","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W146784561","https://openalex.org/W339708172","https://openalex.org/W1544882865","https://openalex.org/W1775840686","https://openalex.org/W2036186630","https://openalex.org/W2096434843","https://openalex.org/W2127135220","https://openalex.org/W2149726555","https://openalex.org/W6605992514"],"related_works":["https://openalex.org/W1488060887","https://openalex.org/W2380467267","https://openalex.org/W1980525453","https://openalex.org/W2325206724","https://openalex.org/W2059960378","https://openalex.org/W2043945969","https://openalex.org/W2103754166","https://openalex.org/W2139484866","https://openalex.org/W2058003010","https://openalex.org/W1994059163"],"abstract_inverted_index":{"This":[0,49],"paper":[1],"implements":[2],"a":[3,76,110,114],"novel":[4],"digital":[5,15,88],"solution":[6,102],"to":[7,82,90],"avoid":[8],"the":[9,22,54,59,66,83,87,92,98],"problem":[10],"of":[11,25],"dead-zone":[12,30],"behavior":[13,31,37,50],"in":[14,33,86,113],"phase":[16,43,56,84],"locked":[17],"loop":[18],"(DPLL)":[19],"caused":[20],"by":[21,105],"quantization":[23],"effect":[24],"time-to-digital":[26],"converter":[27],"(TDC).":[28],"The":[29,100],"results":[32],"chaotic":[34],"limit":[35],"cycle":[36],"causing":[38],"higher":[39],"than":[40],"expected":[41],"in-band":[42],"noise":[44,77],"and":[45,61,70,95,108],"strong":[46],"spurious":[47],"tones.":[48],"is":[51,80,103],"dependent":[52],"on":[53],"initial":[55],"difference":[57],"between":[58],"output":[60],"reference":[62],"clock":[63],"which":[64],"makes":[65],"DPLL":[67,111],"performance":[68],"inconsistent":[69],"unpredictable.":[71],"To":[72],"alleviate":[73],"this":[74],"problem,":[75],"shaped":[78],"offset":[79],"added":[81],"error,":[85],"domain":[89],"keep":[91],"TDC":[93],"active":[94],"away":[96],"from":[97],"dead-zone.":[99],"proposed":[101],"verified":[104],"extensive":[106],"simulation":[107],"using":[109],"prototype":[112],"0.13":[115],"\u00b5m":[116],"CMOS":[117],"process.":[118]},"counts_by_year":[{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
