{"id":"https://openalex.org/W2086726955","doi":"https://doi.org/10.1109/icecs.2011.6122285","title":"A 60-GHz quadrature PLL in 90nm CMOS","display_name":"A 60-GHz quadrature PLL in 90nm CMOS","publication_year":2011,"publication_date":"2011-12-01","ids":{"openalex":"https://openalex.org/W2086726955","doi":"https://doi.org/10.1109/icecs.2011.6122285","mag":"2086726955"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2011.6122285","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2011.6122285","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044630309","display_name":"Fotis Plessas","orcid":"https://orcid.org/0000-0002-7735-3520"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"F. Plessas","raw_affiliation_strings":["Analogies S.A., Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Analogies S.A., Patras, Greece","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078749312","display_name":"Vasileios Panagiotopoulos","orcid":"https://orcid.org/0000-0001-9298-2985"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"V. Panagiotopoulos","raw_affiliation_strings":["Department of Electrical & Computer Engineering, University of Patras, Greece","[Department of Electrical & Computer Engineering, University of Patras, Greece]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Patras, Greece","institution_ids":["https://openalex.org/I174878644"]},{"raw_affiliation_string":"[Department of Electrical & Computer Engineering, University of Patras, Greece]","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110074419","display_name":"V. Kalenteridis","orcid":null},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"V. Kalenteridis","raw_affiliation_strings":["Department of Physics, Aristotle University of Thessaloniki, Greece","Department of Physics , Aristotle University of Thessaloniki , Greece"],"affiliations":[{"raw_affiliation_string":"Department of Physics, Aristotle University of Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]},{"raw_affiliation_string":"Department of Physics , Aristotle University of Thessaloniki , Greece","institution_ids":["https://openalex.org/I21370196"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021162190","display_name":"George Souliotis","orcid":"https://orcid.org/0000-0001-5705-0779"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"G. Souliotis","raw_affiliation_strings":["Analogies S.A., Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Analogies S.A., Patras, Greece","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032468093","display_name":"F. Liakou","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"F. Liakou","raw_affiliation_strings":["Analogies S.A., Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Analogies S.A., Patras, Greece","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016224027","display_name":"S. Koutsomitsos","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Koutsomitsos","raw_affiliation_strings":["Analogies S.A., Patras, Greece"],"affiliations":[{"raw_affiliation_string":"Analogies S.A., Patras, Greece","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025525864","display_name":"S. Siskos","orcid":"https://orcid.org/0000-0002-9506-9435"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"S. Siskos","raw_affiliation_strings":["Department of Physics, Aristotle University of Thessaloniki, Greece","Department of Physics , Aristotle University of Thessaloniki , Greece"],"affiliations":[{"raw_affiliation_string":"Department of Physics, Aristotle University of Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]},{"raw_affiliation_string":"Department of Physics , Aristotle University of Thessaloniki , Greece","institution_ids":["https://openalex.org/I21370196"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040779169","display_name":"A. N. Birbas","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"A. Birbas","raw_affiliation_strings":["Department of Electrical & Computer Engineering, University of Patras, Greece","[Department of Electrical & Computer Engineering, University of Patras, Greece]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Patras, Greece","institution_ids":["https://openalex.org/I174878644"]},{"raw_affiliation_string":"[Department of Electrical & Computer Engineering, University of Patras, Greece]","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5044630309"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.265,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.62172065,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"350","last_page":"353"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10262","display_name":"Microwave Engineering and Waveguides","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7768086194992065},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7604769468307495},{"id":"https://openalex.org/keywords/quadrature","display_name":"Quadrature (astronomy)","score":0.6718602776527405},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4888452887535095},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4378505051136017},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.19561836123466492},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14539393782615662}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7768086194992065},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7604769468307495},{"id":"https://openalex.org/C62869609","wikidata":"https://www.wikidata.org/wiki/Q28137","display_name":"Quadrature (astronomy)","level":2,"score":0.6718602776527405},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4888452887535095},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4378505051136017},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.19561836123466492},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14539393782615662}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2011.6122285","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2011.6122285","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2011 18th IEEE International Conference on Electronics, Circuits, and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8700000047683716,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1484757663","https://openalex.org/W1509956468","https://openalex.org/W1525131902","https://openalex.org/W1536945048","https://openalex.org/W2023983285","https://openalex.org/W2085285682","https://openalex.org/W2096009017","https://openalex.org/W2117572544","https://openalex.org/W2154470531","https://openalex.org/W3215001866","https://openalex.org/W6628921000"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W1576949837","https://openalex.org/W4360861688","https://openalex.org/W3134930219","https://openalex.org/W984417604","https://openalex.org/W2967785526","https://openalex.org/W2065391525","https://openalex.org/W4225994594","https://openalex.org/W2109445684","https://openalex.org/W2081082331"],"abstract_inverted_index":{"A":[0],"1.2":[1,39],"V":[2,40],"60":[3,35],"GHz":[4,36],"120":[5],"mW":[6],"phase-locked":[7],"loop":[8],"employing":[9],"a":[10,15,20,27,38,45,52],"quadrature":[11],"differential":[12],"voltage-controlled":[13],"oscillator,":[14],"programmable":[16],"charge":[17],"pump,":[18],"and":[19,32],"frequency":[21,53],"quadrupler":[22],"is":[23],"presented.":[24],"Implemented":[25],"in":[26],"90":[28],"m":[29],"CMOS":[30],"process":[31],"operating":[33],"at":[34,51],"with":[37],"supply,":[41],"the":[42],"PLL":[43],"achieves":[44],"phase":[46],"noise":[47],"of":[48,55],"-91":[49],"dBc/Hz":[50],"offset":[54],"1":[56],"MHz.":[57]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}