{"id":"https://openalex.org/W2039940348","doi":"https://doi.org/10.1109/icecs.2010.5724517","title":"Design of 9T SRAM for dynamic voltage supplies by a multiobjective optimization approach","display_name":"Design of 9T SRAM for dynamic voltage supplies by a multiobjective optimization approach","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2039940348","doi":"https://doi.org/10.1109/icecs.2010.5724517","mag":"2039940348"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2010.5724517","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2010.5724517","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 17th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113780449","display_name":"Hans Kristian Otnes Berge","orcid":null},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]},{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]},{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE","NO"],"is_corresponding":true,"raw_author_name":"Hans Kristian Otnes Berge","raw_affiliation_strings":["Cognitronics and Sensor Systems, University of Bielefeld, Germany","Department of Informatics, University of Oslo, Norway","System and Circuit Technology, University of Paderborn, Germany"],"affiliations":[{"raw_affiliation_string":"Cognitronics and Sensor Systems, University of Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]},{"raw_affiliation_string":"Department of Informatics, University of Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"System and Circuit Technology, University of Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081108014","display_name":"Matthias Blesken","orcid":null},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]},{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]},{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE","NO"],"is_corresponding":false,"raw_author_name":"Matthias Blesken","raw_affiliation_strings":["Cognitronics and Sensor Systems, University of Bielefeld, Germany","Department of Informatics, University of Oslo, Norway","System and Circuit Technology, University of Paderborn, Germany"],"affiliations":[{"raw_affiliation_string":"Cognitronics and Sensor Systems, University of Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]},{"raw_affiliation_string":"Department of Informatics, University of Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"System and Circuit Technology, University of Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026627174","display_name":"Snorre Aunet","orcid":"https://orcid.org/0000-0002-6465-8886"},"institutions":[{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]},{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]},{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]}],"countries":["DE","NO"],"is_corresponding":false,"raw_author_name":"Snorre Aunet","raw_affiliation_strings":["Cognitronics and Sensor Systems, University of Bielefeld, Germany","Department of Informatics, University of Oslo, Norway","System and Circuit Technology, University of Paderborn, Germany"],"affiliations":[{"raw_affiliation_string":"Cognitronics and Sensor Systems, University of Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]},{"raw_affiliation_string":"Department of Informatics, University of Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"System and Circuit Technology, University of Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043372144","display_name":"Ulrich R\u00fcckert","orcid":null},"institutions":[{"id":"https://openalex.org/I184942183","display_name":"University of Oslo","ror":"https://ror.org/01xtthb56","country_code":"NO","type":"education","lineage":["https://openalex.org/I184942183"]},{"id":"https://openalex.org/I20121455","display_name":"Bielefeld University","ror":"https://ror.org/02hpadn98","country_code":"DE","type":"education","lineage":["https://openalex.org/I20121455"]},{"id":"https://openalex.org/I206945453","display_name":"Paderborn University","ror":"https://ror.org/058kzsd48","country_code":"DE","type":"education","lineage":["https://openalex.org/I206945453"]}],"countries":["DE","NO"],"is_corresponding":false,"raw_author_name":"Ulrich Ruckert","raw_affiliation_strings":["Department of Informatics, University of Oslo, Norway","System and Circuit Technology, University of Paderborn, Germany","Cognitronics and Sensor Systems, University of Bielefeld, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Informatics, University of Oslo, Norway","institution_ids":["https://openalex.org/I184942183"]},{"raw_affiliation_string":"System and Circuit Technology, University of Paderborn, Germany","institution_ids":["https://openalex.org/I206945453"]},{"raw_affiliation_string":"Cognitronics and Sensor Systems, University of Bielefeld, Germany","institution_ids":["https://openalex.org/I20121455"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5113780449"],"corresponding_institution_ids":["https://openalex.org/I184942183","https://openalex.org/I20121455","https://openalex.org/I206945453"],"apc_list":null,"apc_paid":null,"fwci":0.5773,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.71274864,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"26","issue":null,"first_page":"319","last_page":"322"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7903709411621094},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.7550532817840576},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.622571587562561},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4628526270389557},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4622843563556671},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4575080871582031},{"id":"https://openalex.org/keywords/multi-objective-optimization","display_name":"Multi-objective optimization","score":0.4264781177043915},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3769395649433136},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3243405222892761},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32204878330230713},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2516708970069885},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2365190088748932},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.195153146982193},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14252519607543945}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7903709411621094},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.7550532817840576},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.622571587562561},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4628526270389557},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4622843563556671},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4575080871582031},{"id":"https://openalex.org/C68781425","wikidata":"https://www.wikidata.org/wiki/Q2052203","display_name":"Multi-objective optimization","level":2,"score":0.4264781177043915},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3769395649433136},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3243405222892761},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32204878330230713},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2516708970069885},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2365190088748932},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.195153146982193},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14252519607543945},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2010.5724517","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2010.5724517","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 17th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W225560312","https://openalex.org/W649475307","https://openalex.org/W1522538275","https://openalex.org/W2002612140","https://openalex.org/W2055857026","https://openalex.org/W2057899754","https://openalex.org/W2067168777","https://openalex.org/W2087405415","https://openalex.org/W2098931949","https://openalex.org/W2099087448","https://openalex.org/W2099760741","https://openalex.org/W2106334424","https://openalex.org/W2106339466","https://openalex.org/W2144289559","https://openalex.org/W2157683079","https://openalex.org/W2158267481","https://openalex.org/W6608886761","https://openalex.org/W6621419976","https://openalex.org/W6631460888"],"related_works":["https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W4293253840","https://openalex.org/W4378977321","https://openalex.org/W2967161359","https://openalex.org/W1976168335","https://openalex.org/W4308090481","https://openalex.org/W3211992815"],"abstract_inverted_index":{"In":[0,48],"this":[1,137,162],"paper":[2,163],"we":[3,104,138],"present":[4],"design":[5,112],"and":[6,37,57,67,94,119,146,172],"optimization":[7,108,122],"results":[8],"of":[9,34,77,127,130,151,161,166],"a":[10,15,41,81,106,177],"9T":[11,159],"SRAM":[12,52,98],"cell":[13,31,53,79,160],"in":[14,100],"65":[16],"nm":[17],"low":[18,58],"power":[19,171],"technology,":[20],"which":[21],"previously":[22],"has":[23],"not":[24],"been":[25],"investigated":[26],"for":[27,64,97,143],"subthreshold":[28],"operation.":[29,70],"The":[30,71,121],"is":[32,90],"capable":[33],"both":[35,55,101],"read":[36,69],"write":[38],"operations":[39],"on":[40,75,136],"supply":[42],"voltage":[43,102],"from":[44],"300mV":[45],"to":[46,87,155],"1.2V.":[47],"our":[49,111],"implementation":[50],"the":[51,78,128,144,149,152,158],"employs":[54],"high":[56],"V":[59],"<sub":[60],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[61],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">t</sub>":[62],"devices":[63],"lower":[65],"leakage":[66,170],"faster":[68],"current":[72],"work":[73],"focuses":[74],"operation":[76],"as":[80],"single":[82],"port":[83,89],"SRAM,":[84],"although":[85],"extension":[86],"dual":[88],"possible.":[91],"To":[92],"optimize":[93,148],"find":[95],"trade-offs":[96],"performance":[99],"domains":[103],"use":[105],"multiobjective":[107],"method,":[109],"where":[110],"goals":[113],"were":[114],"robustness,":[115],"leakage,":[116],"operating":[117],"speed":[118],"area.":[120],"method":[123],"provides":[124],"an":[125],"approximation":[126],"set":[129],"all":[131],"Pareto":[132],"optimal":[133],"designs.":[134],"Based":[135],"may":[139],"quickly":[140],"select":[141],"criteria":[142],"objectives":[145],"easily":[147],"rest":[150],"parameters.":[153],"Compared":[154],"recent":[156],"publications":[157],"shows":[164],"promise":[165],"greatly":[167],"reducing":[168],"standby":[169],"good":[173],"robustness":[174],"while":[175],"retaining":[176],"similar":[178],"speed.":[179]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
