{"id":"https://openalex.org/W2014216531","doi":"https://doi.org/10.1109/icecs.2009.5410965","title":"A heterogenous approach to symbolic calculations based on structural numbers","display_name":"A heterogenous approach to symbolic calculations based on structural numbers","publication_year":2009,"publication_date":"2009-12-01","ids":{"openalex":"https://openalex.org/W2014216531","doi":"https://doi.org/10.1109/icecs.2009.5410965","mag":"2014216531"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2009.5410965","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2009.5410965","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039488441","display_name":"Andrzej Pu\u0142ka","orcid":"https://orcid.org/0000-0001-6853-3610"},"institutions":[{"id":"https://openalex.org/I119004910","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442","country_code":"PL","type":"education","lineage":["https://openalex.org/I119004910"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Andrzej Pulka","raw_affiliation_strings":["Institute of Electronics, Silesian University of Technology, Gliwice, Poland","Inst. of Electron., Silesian Univ. of Technol., Gliwice, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, Silesian University of Technology, Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]},{"raw_affiliation_string":"Inst. of Electron., Silesian Univ. of Technol., Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041305062","display_name":"\u0141ukasz Golly","orcid":null},"institutions":[{"id":"https://openalex.org/I119004910","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442","country_code":"PL","type":"education","lineage":["https://openalex.org/I119004910"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Lukasz Golly","raw_affiliation_strings":["Institute of Electronics, Silesian University of Technology, Gliwice, Poland","Inst. of Electron., Silesian Univ. of Technol., Gliwice, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, Silesian University of Technology, Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]},{"raw_affiliation_string":"Inst. of Electron., Silesian Univ. of Technol., Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I119004910"],"apc_list":null,"apc_paid":null,"fwci":1.4563,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.77857632,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"163","last_page":"166"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7432827949523926},{"id":"https://openalex.org/keywords/graph-theory","display_name":"Graph theory","score":0.5459337830543518},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.5261896252632141},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.49883484840393066},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4722644090652466},{"id":"https://openalex.org/keywords/base","display_name":"Base (topology)","score":0.458956778049469},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.16314274072647095}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7432827949523926},{"id":"https://openalex.org/C88230418","wikidata":"https://www.wikidata.org/wiki/Q131476","display_name":"Graph theory","level":2,"score":0.5459337830543518},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.5261896252632141},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.49883484840393066},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4722644090652466},{"id":"https://openalex.org/C42058472","wikidata":"https://www.wikidata.org/wiki/Q810214","display_name":"Base (topology)","level":2,"score":0.458956778049469},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.16314274072647095},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2009.5410965","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2009.5410965","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1632737176","https://openalex.org/W1934611922","https://openalex.org/W2032733423","https://openalex.org/W2125465935","https://openalex.org/W2130915325","https://openalex.org/W2152211357","https://openalex.org/W2170400701"],"related_works":["https://openalex.org/W3142859449","https://openalex.org/W4390041478","https://openalex.org/W4317708411","https://openalex.org/W4313433513","https://openalex.org/W2373173956","https://openalex.org/W2532801570","https://openalex.org/W4385627933","https://openalex.org/W2480127678","https://openalex.org/W2806270048","https://openalex.org/W4310605282"],"abstract_inverted_index":{"The":[0,18,31],"paper":[1],"presents":[2],"an":[3],"approach":[4,59],"to":[5,52],"the":[6,61],"problem":[7],"of":[8,11,57],"automated":[9],"generation":[10,47],"symbolic":[12],"functions":[13],"for":[14],"complex":[15],"electronic":[16],"circuits.":[17],"new":[19,58],"methodology":[20],"based":[21],"on":[22,43],"structural":[23],"numbers":[24],"combined":[25],"with":[26],"graph":[27],"theory":[28],"is":[29,33,41],"described.":[30],"algorithm":[32],"formulated":[34],"and":[35,55],"its":[36],"implementation":[37],"as":[38],"BASE":[39],"program":[40],"presented":[42],"examples.":[44],"Results":[45],"presenting":[46],"times":[48],"are":[49],"given.":[50],"Comparison":[51],"classical":[53],"techniques":[54],"benefits":[56],"summarize":[60],"contribution.":[62]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
