{"id":"https://openalex.org/W2105318077","doi":"https://doi.org/10.1109/icecs.2009.5410773","title":"Evaluating the performance of a configurable, extensible VLIW processor in FFT execution","display_name":"Evaluating the performance of a configurable, extensible VLIW processor in FFT execution","publication_year":2009,"publication_date":"2009-12-01","ids":{"openalex":"https://openalex.org/W2105318077","doi":"https://doi.org/10.1109/icecs.2009.5410773","mag":"2105318077"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2009.5410773","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2009.5410773","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034096161","display_name":"David Stevens","orcid":"https://orcid.org/0000-0001-6600-036X"},"institutions":[{"id":"https://openalex.org/I143804889","display_name":"Loughborough University","ror":"https://ror.org/04vg4w365","country_code":"GB","type":"education","lineage":["https://openalex.org/I143804889"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"D. Stevens","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Loughborough University, UK","Department of Electronic and Electrical Engineering, Loughborough University, , UK"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Loughborough University, UK","institution_ids":["https://openalex.org/I143804889"]},{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Loughborough University, , UK","institution_ids":["https://openalex.org/I143804889"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007866157","display_name":"N. Glynn","orcid":null},"institutions":[{"id":"https://openalex.org/I143804889","display_name":"Loughborough University","ror":"https://ror.org/04vg4w365","country_code":"GB","type":"education","lineage":["https://openalex.org/I143804889"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"N. Glynn","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Loughborough University, UK","Department of Electronic and Electrical Engineering, Loughborough University, , UK"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Loughborough University, UK","institution_ids":["https://openalex.org/I143804889"]},{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Loughborough University, , UK","institution_ids":["https://openalex.org/I143804889"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061904936","display_name":"Panagiotis Galiatsatos","orcid":"https://orcid.org/0000-0002-8679-5152"},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"P. Galiatsatos","raw_affiliation_strings":["Department of Physics, Electronics Laboratory, National and Kapodistrian University of Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Physics, Electronics Laboratory, National and Kapodistrian University of Athens, Greece","institution_ids":["https://openalex.org/I200777214"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111902577","display_name":"V.A. Chouliaras","orcid":null},"institutions":[{"id":"https://openalex.org/I143804889","display_name":"Loughborough University","ror":"https://ror.org/04vg4w365","country_code":"GB","type":"education","lineage":["https://openalex.org/I143804889"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"V. Chouliaras","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, Loughborough University, UK","Department of Electronic and Electrical Engineering, Loughborough University, , UK"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Loughborough University, UK","institution_ids":["https://openalex.org/I143804889"]},{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, Loughborough University, , UK","institution_ids":["https://openalex.org/I143804889"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030998325","display_name":"Dionysios Reisis","orcid":"https://orcid.org/0000-0002-9265-3599"},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"D. Reisis","raw_affiliation_strings":["Department of Physics, Electronics Laboratory, National and Kapodistrian University of Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Physics, Electronics Laboratory, National and Kapodistrian University of Athens, Greece","institution_ids":["https://openalex.org/I200777214"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5034096161"],"corresponding_institution_ids":["https://openalex.org/I143804889"],"apc_list":null,"apc_paid":null,"fwci":0.7049,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.68603707,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"771","last_page":"774"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.8845813274383545},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8693912029266357},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.78253173828125},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.7233293056488037},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6444573998451233},{"id":"https://openalex.org/keywords/loop-unrolling","display_name":"Loop unrolling","score":0.602959394454956},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.4792342483997345},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36065834760665894},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15307661890983582},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.11948436498641968}],"concepts":[{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.8845813274383545},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8693912029266357},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.78253173828125},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.7233293056488037},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6444573998451233},{"id":"https://openalex.org/C76970557","wikidata":"https://www.wikidata.org/wiki/Q1869750","display_name":"Loop unrolling","level":3,"score":0.602959394454956},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.4792342483997345},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36065834760665894},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15307661890983582},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.11948436498641968}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2009.5410773","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2009.5410773","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1923763959","https://openalex.org/W2026141050","https://openalex.org/W2073335165","https://openalex.org/W2101767850","https://openalex.org/W2104176873","https://openalex.org/W2125170137","https://openalex.org/W2165288094","https://openalex.org/W2171697422","https://openalex.org/W6640355072","https://openalex.org/W6675859611"],"related_works":["https://openalex.org/W2996717348","https://openalex.org/W1044727952","https://openalex.org/W2099279072","https://openalex.org/W1899165969","https://openalex.org/W2155583896","https://openalex.org/W4230458386","https://openalex.org/W2058188174","https://openalex.org/W1998118780","https://openalex.org/W4248667787","https://openalex.org/W1769051252"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,6,9,28,37,62,67,74,82,104],"setup":[4],"and":[5,31,51,81],"evaluation":[7],"of":[8,27],"LE1":[10,38,69],"configurable,":[11],"extensible,":[12],"multi-cluster":[13],"VLIW":[14],"processor":[15],"system":[16],"in":[17,57],"FFT":[18,29,75,100],"execution.":[19],"The":[20],"input":[21],"code":[22],"is":[23],"a":[24,91],"C":[25,106],"implementation":[26],"algorithm":[30],"we":[32,86],"evaluate":[33],"its":[34],"performance":[35],"on":[36],"simulator":[39],"for":[40],"multiple":[41],"CPU":[42],"configurations":[43],"(issue":[44],"width,":[45],"execution":[46],"resource":[47],"mix,":[48],"custom":[49],"instruction)":[50],"compiler":[52],"optimizations":[53],"(inlining,":[54],"loop":[55],"unrolling)":[56],"an":[58],"effort":[59],"to":[60,73,90],"optimize":[61],"cycle":[63,76],"count.":[64],"We":[65],"identify":[66],"prevailing":[68],"configurations,":[70],"with":[71],"respect":[72],"performance,":[77],"their":[78],"silicon":[79],"area":[80],"power":[83],"dissipation.":[84],"Finally,":[85],"compare":[87],"these":[88],"results":[89],"fully":[92],"systolic":[93],"single":[94],"datapath":[95],"delay":[96],"feedback":[97],"(SDF)":[98],"VLSI":[99],"architecture":[101],"derived":[102],"from":[103],"same":[105],"code.":[107]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}