{"id":"https://openalex.org/W2142884585","doi":"https://doi.org/10.1109/icecs.2008.4675095","title":"Asynchronous Linear Pipelines: An efficient-optimal pipelining algorithm","display_name":"Asynchronous Linear Pipelines: An efficient-optimal pipelining algorithm","publication_year":2008,"publication_date":"2008-08-01","ids":{"openalex":"https://openalex.org/W2142884585","doi":"https://doi.org/10.1109/icecs.2008.4675095","mag":"2142884585"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2008.4675095","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4675095","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084741373","display_name":"Eslam Yahya","orcid":null},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Eslam Yahya","raw_affiliation_strings":["Banha High Institute of Technology, Banha, Egypt","CIS Group, TIMA Laboratory, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"Banha High Institute of Technology, Banha, Egypt","institution_ids":[]},{"raw_affiliation_string":"CIS Group, TIMA Laboratory, Grenoble, France","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5017617798","display_name":"Marc Renaudin","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Marc Renaudin","raw_affiliation_strings":["TIEMPO SAS, Grenoble, France"],"affiliations":[{"raw_affiliation_string":"TIEMPO SAS, Grenoble, France","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5084741373"],"corresponding_institution_ids":["https://openalex.org/I4210087012"],"apc_list":null,"apc_paid":null,"fwci":0.28520716,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.66019994,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"7","issue":null,"first_page":"1285","last_page":"1289"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8416732549667358},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.823938250541687},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.8191721439361572},{"id":"https://openalex.org/keywords/pipeline-transport","display_name":"Pipeline transport","score":0.7353601455688477},{"id":"https://openalex.org/keywords/software-pipelining","display_name":"Software pipelining","score":0.6554960012435913},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6136221289634705},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5466530323028564},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5402033925056458},{"id":"https://openalex.org/keywords/variable","display_name":"Variable (mathematics)","score":0.5051220059394836},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.424325555562973},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.41588449478149414},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3511059284210205},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.10000267624855042},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.07586511969566345},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07002720236778259},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0681706964969635}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8416732549667358},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.823938250541687},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.8191721439361572},{"id":"https://openalex.org/C175309249","wikidata":"https://www.wikidata.org/wiki/Q725864","display_name":"Pipeline transport","level":2,"score":0.7353601455688477},{"id":"https://openalex.org/C188854837","wikidata":"https://www.wikidata.org/wiki/Q268469","display_name":"Software pipelining","level":3,"score":0.6554960012435913},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6136221289634705},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5466530323028564},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5402033925056458},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.5051220059394836},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.424325555562973},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.41588449478149414},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3511059284210205},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.10000267624855042},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.07586511969566345},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07002720236778259},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0681706964969635},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C87717796","wikidata":"https://www.wikidata.org/wiki/Q146326","display_name":"Environmental engineering","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2008.4675095","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4675095","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.699999988079071,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W16511050","https://openalex.org/W1490383387","https://openalex.org/W1937545609","https://openalex.org/W2024977123","https://openalex.org/W2102326977","https://openalex.org/W2144801428","https://openalex.org/W2150872535","https://openalex.org/W2487142227","https://openalex.org/W4299507296","https://openalex.org/W6640537675"],"related_works":["https://openalex.org/W4380433113","https://openalex.org/W4386072068","https://openalex.org/W252339960","https://openalex.org/W1948903516","https://openalex.org/W1993985975","https://openalex.org/W2390529043","https://openalex.org/W2378320433","https://openalex.org/W2985738161","https://openalex.org/W2187164010","https://openalex.org/W4312516786"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"a":[3,58],"new":[4],"methodology":[5],"for":[6],"optimizing":[7],"the":[8,25,34,50,65,69,74],"performance":[9,60],"of":[10,37,53,68],"asynchronous-linear":[11],"pipelines.":[12],"The":[13,45],"method":[14,46],"supports":[15],"all":[16],"delay":[17],"types,":[18],"static":[19],"and":[20,42],"variable":[21],"time":[22],"delays,":[23],"enabling":[24],"designers":[26],"to":[27,56,72],"optimize":[28],"their":[29],"architecture":[30],"taking":[31],"into":[32],"account":[33],"timing":[35],"information":[36],"data":[38],"dependencies,":[39],"circuit":[40],"structure":[41],"process":[43],"variations.":[44],"not":[47],"only":[48],"determines":[49],"minimum":[51],"degree":[52],"pipelining":[54],"necessary":[55],"satisfy":[57],"given":[59],"target,":[61],"but":[62],"also":[63],"computes":[64],"optimum":[66],"placement":[67],"pipeline":[70],"stages":[71],"maximize":[73],"throughput.":[75]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}