{"id":"https://openalex.org/W2122860547","doi":"https://doi.org/10.1109/icecs.2008.4674974","title":"A wide-range DLL-based clock generator with phase error calibration","display_name":"A wide-range DLL-based clock generator with phase error calibration","publication_year":2008,"publication_date":"2008-08-01","ids":{"openalex":"https://openalex.org/W2122860547","doi":"https://doi.org/10.1109/icecs.2008.4674974","mag":"2122860547"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2008.4674974","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4674974","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102178485","display_name":"Kuo-Hsing Cheng","orcid":null},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuo-Hsing Cheng","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Taoyuan, Taiwan","Dept. of Electr. Eng., Nat. Central Univ., Jhongli"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Taoyuan, Taiwan","institution_ids":["https://openalex.org/I22265921"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Central Univ., Jhongli","institution_ids":["https://openalex.org/I22265921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109239690","display_name":"Chia-Wei Su","orcid":null},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chia-Wei Su","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Taoyuan, Taiwan","Dept. of Electr. Eng., Nat. Central Univ., Jhongli"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Taoyuan, Taiwan","institution_ids":["https://openalex.org/I22265921"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Central Univ., Jhongli","institution_ids":["https://openalex.org/I22265921"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055725674","display_name":"Meng\u2010Jhe Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Meng-Jhe Wu","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Taoyuan, Taiwan","Dept. of Electr. Eng., Nat. Central Univ., Jhongli"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Taoyuan, Taiwan","institution_ids":["https://openalex.org/I22265921"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Central Univ., Jhongli","institution_ids":["https://openalex.org/I22265921"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081846803","display_name":"Y. L. Chang","orcid":"https://orcid.org/0000-0002-0196-3496"},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Ling Chang","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Taoyuan, Taiwan","Dept. of Electr. Eng., Nat. Central Univ., Jhongli"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Taoyuan, Taiwan","institution_ids":["https://openalex.org/I22265921"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Central Univ., Jhongli","institution_ids":["https://openalex.org/I22265921"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.3567,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.82487009,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"798","last_page":"801"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.7287290692329407},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.6324138641357422},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6020768880844116},{"id":"https://openalex.org/keywords/frequency-multiplier","display_name":"Frequency multiplier","score":0.5856207609176636},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.503370463848114},{"id":"https://openalex.org/keywords/phase-frequency-detector","display_name":"Phase frequency detector","score":0.48076102137565613},{"id":"https://openalex.org/keywords/phase-detector","display_name":"Phase detector","score":0.47842937707901},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44899505376815796},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.433536171913147},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.4166967272758484},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3444878160953522},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2592252492904663},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.1905890703201294},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.18936631083488464},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.18192538619041443},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.17996880412101746},{"id":"https://openalex.org/keywords/charge-pump","display_name":"Charge pump","score":0.14880263805389404},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09879013895988464},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09663358330726624}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.7287290692329407},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.6324138641357422},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6020768880844116},{"id":"https://openalex.org/C146002875","wikidata":"https://www.wikidata.org/wiki/Q1074289","display_name":"Frequency multiplier","level":3,"score":0.5856207609176636},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.503370463848114},{"id":"https://openalex.org/C2776158855","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase frequency detector","level":5,"score":0.48076102137565613},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.47842937707901},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44899505376815796},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.433536171913147},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.4166967272758484},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3444878160953522},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2592252492904663},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.1905890703201294},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.18936631083488464},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.18192538619041443},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.17996880412101746},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.14880263805389404},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09879013895988464},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09663358330726624},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2008.4674974","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4674974","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8399999737739563}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1582186593","https://openalex.org/W2005421687","https://openalex.org/W2072988589","https://openalex.org/W2095624237","https://openalex.org/W2111053525","https://openalex.org/W2134899771","https://openalex.org/W2136138043","https://openalex.org/W2143232235","https://openalex.org/W2143645323","https://openalex.org/W2163095973","https://openalex.org/W2169190898","https://openalex.org/W2544113719","https://openalex.org/W2587442922","https://openalex.org/W2788760024"],"related_works":["https://openalex.org/W1603399793","https://openalex.org/W1552660254","https://openalex.org/W4206328274","https://openalex.org/W3081098926","https://openalex.org/W1691451471","https://openalex.org/W3036909566","https://openalex.org/W1606727086","https://openalex.org/W1486698883","https://openalex.org/W2895746866","https://openalex.org/W2122860547"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3],"wide-range":[4],"operation":[5,29],"and":[6,23,82,95,101],"phase":[7,42,48,57],"error":[8,58],"calibration":[9],"DLL-based":[10],"clock":[11,33,37],"generator":[12,38],"is":[13],"proposed.":[14],"By":[15],"using":[16],"multi-band":[17],"voltage":[18],"controlled":[19],"delay":[20],"line":[21],"(MBVCDL)":[22],"frequency":[24,30,84,87,105],"multiplier":[25,85,106],"to":[26,45,61,80,90],"expand":[27],"the":[28,55,74,83,96],"range":[31],"of":[32,63],"generator.":[34],"The":[35,50,69,92],"proposed":[36,51,75],"uses":[39],"detect":[40],"window":[41],"detector":[43],"(DWPD)":[44],"effectively":[46],"reduce":[47,54],"error.":[49],"DLL":[52,64,76],"can":[53],"maximum":[56],"form":[59],"3.57\u00b0":[60],"1.098\u00b0":[62],"multiphase":[65],"output":[66,107],"at":[67,103],"250MHz.":[68],"simulation":[70],"results":[71],"show":[72],"that":[73],"operates":[77],"from":[78,88],"25MHz":[79],"250MHz":[81,89],"synthesizes":[86],"2.5GHz.":[91],"power":[93],"dissipation":[94],"peak-to-peak":[97],"jitter":[98],"are":[99],"10.1mW":[100],"22.6ps":[102],"2.5GHz":[104],"frequency.":[108]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}