{"id":"https://openalex.org/W2156475759","doi":"https://doi.org/10.1109/icecs.2008.4674872","title":"An ADPLL-based fast start-up technique for sensor radio frequency synthesizers","display_name":"An ADPLL-based fast start-up technique for sensor radio frequency synthesizers","publication_year":2008,"publication_date":"2008-08-01","ids":{"openalex":"https://openalex.org/W2156475759","doi":"https://doi.org/10.1109/icecs.2008.4674872","mag":"2156475759"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2008.4674872","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4674872","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084132515","display_name":"Liangge Xu","orcid":"https://orcid.org/0000-0002-2332-5321"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Liangge Xu","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland"],"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021085626","display_name":"S. Lindfors","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Saska Lindfors","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland"],"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002785746","display_name":"Jussi Ryyn\u00e4nen","orcid":"https://orcid.org/0000-0002-2241-092X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jussi Ryynanen","raw_affiliation_strings":["Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland"],"affiliations":[{"raw_affiliation_string":"Electronic Circuit Design Laboratory, Helsinki University of Technology, Finland","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5084132515"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.16572013,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"54","issue":null,"first_page":"388","last_page":"391"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/frequency-synthesizer","display_name":"Frequency synthesizer","score":0.7295415997505188},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.7217229008674622},{"id":"https://openalex.org/keywords/direct-digital-synthesizer","display_name":"Direct digital synthesizer","score":0.7013736367225647},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.646077573299408},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5476244688034058},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4865521490573883},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.46942073106765747},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.3816509246826172},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.32804301381111145},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2504318356513977},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10554578900337219}],"concepts":[{"id":"https://openalex.org/C182099602","wikidata":"https://www.wikidata.org/wiki/Q2660678","display_name":"Frequency synthesizer","level":4,"score":0.7295415997505188},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.7217229008674622},{"id":"https://openalex.org/C166089067","wikidata":"https://www.wikidata.org/wiki/Q1227465","display_name":"Direct digital synthesizer","level":5,"score":0.7013736367225647},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.646077573299408},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5476244688034058},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4865521490573883},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.46942073106765747},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.3816509246826172},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.32804301381111145},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2504318356513977},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10554578900337219},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2008.4674872","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4674872","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321855","display_name":"Tekes","ror":"https://ror.org/02ag8cq23"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1980041945","https://openalex.org/W2034484545","https://openalex.org/W2102580073","https://openalex.org/W2124980043","https://openalex.org/W2125673187","https://openalex.org/W2145571623","https://openalex.org/W2152716628","https://openalex.org/W2162726682","https://openalex.org/W2164582257","https://openalex.org/W3217383754","https://openalex.org/W4243375746","https://openalex.org/W6682420930"],"related_works":["https://openalex.org/W3145870900","https://openalex.org/W2350523680","https://openalex.org/W2353586717","https://openalex.org/W2371350995","https://openalex.org/W2379961307","https://openalex.org/W2021767931","https://openalex.org/W2376421545","https://openalex.org/W2544336511","https://openalex.org/W2374761771","https://openalex.org/W2354027044"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,56,67],"technique":[4,22],"to":[5,31],"speed":[6],"up":[7],"the":[8,82,86],"start-up":[9,83],"process":[10],"of":[11,51,85],"frequency":[12,87],"synthesizers":[13],"for":[14,64],"wireless":[15],"sensor":[16],"network":[17],"(WSN)":[18],"applications.":[19],"The":[20,49],"proposed":[21],"relies":[23],"on":[24,46],"an":[25,39],"all-digital":[26],"phase-locked":[27],"loop":[28],"(ADPLL)":[29],"architecture":[30],"preserve":[32],"last":[33],"known":[34],"settled":[35],"synthesizer":[36,88],"state":[37],"over":[38],"extended":[40],"power-down":[41],"period":[42],"and":[43],"use":[44],"it":[45],"next":[47],"power-up.":[48],"effect":[50],"periodic":[52],"variations":[53],"such":[54],"as":[55],"change":[57],"in":[58],"die":[59],"temperature":[60,80],"is":[61],"digitally":[62],"compensated":[63],"by":[65],"utilizing":[66],"simple":[68],"least":[69],"mean-square":[70],"(LMS)":[71],"adaptation":[72],"algorithm.":[73],"Simulations":[74],"demonstrate":[75],"that":[76],"with":[77],"slow":[78],"ambient":[79],"drift,":[81],"time":[84],"can":[89],"be":[90],"dramatically":[91],"reduced.":[92]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
