{"id":"https://openalex.org/W2151430751","doi":"https://doi.org/10.1109/icecs.2008.4674805","title":"Limit cycle behavior in a class-AB second-order square root domain filter","display_name":"Limit cycle behavior in a class-AB second-order square root domain filter","publication_year":2008,"publication_date":"2008-08-01","ids":{"openalex":"https://openalex.org/W2151430751","doi":"https://doi.org/10.1109/icecs.2008.4674805","mag":"2151430751"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2008.4674805","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4674805","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031463119","display_name":"Carlos A. De La Cruz\u2010Blas","orcid":"https://orcid.org/0000-0002-4136-5079"},"institutions":[{"id":"https://openalex.org/I88155538","display_name":"Universidad de Navarra","ror":"https://ror.org/02rxc7m23","country_code":"ES","type":"education","lineage":["https://openalex.org/I88155538"]},{"id":"https://openalex.org/I175051016","display_name":"Universidad Publica de Navarra","ror":"https://ror.org/02z0cah89","country_code":"ES","type":"education","lineage":["https://openalex.org/I175051016"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Carlos A. De La Cruz Blas","raw_affiliation_strings":["Department of Electrical Engineering, Public University of Navarra, Pamplona, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Public University of Navarra, Pamplona, Spain","institution_ids":["https://openalex.org/I175051016","https://openalex.org/I88155538"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074660128","display_name":"Orla Feely","orcid":"https://orcid.org/0000-0003-3426-6854"},"institutions":[{"id":"https://openalex.org/I100930933","display_name":"University College Dublin","ror":"https://ror.org/05m7pjf47","country_code":"IE","type":"education","lineage":["https://openalex.org/I100930933"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Orla Feely","raw_affiliation_strings":["Electronic and Electrical Engineering, University College Dublin, Dublin, Ireland"],"affiliations":[{"raw_affiliation_string":"Electronic and Electrical Engineering, University College Dublin, Dublin, Ireland","institution_ids":["https://openalex.org/I100930933"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5031463119"],"corresponding_institution_ids":["https://openalex.org/I175051016","https://openalex.org/I88155538"],"apc_list":null,"apc_paid":null,"fwci":0.9689,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.77785768,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"117","last_page":"120"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11160","display_name":"Acoustic Wave Resonator Technologies","score":0.9919999837875366,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10369","display_name":"Advanced MEMS and NEMS Technologies","score":0.9915000200271606,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/companding","display_name":"Companding","score":0.7111028432846069},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5197729468345642},{"id":"https://openalex.org/keywords/limit-cycle","display_name":"Limit cycle","score":0.5130709409713745},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.5024652481079102},{"id":"https://openalex.org/keywords/square-root","display_name":"Square root","score":0.4811321794986725},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4649236500263214},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4493723511695862},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.43004146218299866},{"id":"https://openalex.org/keywords/low-pass-filter","display_name":"Low-pass filter","score":0.4235497713088989},{"id":"https://openalex.org/keywords/filter-design","display_name":"Filter design","score":0.4112861156463623},{"id":"https://openalex.org/keywords/limit","display_name":"Limit (mathematics)","score":0.378821462392807},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36093616485595703},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3456958532333374},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3407291769981384},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19240519404411316},{"id":"https://openalex.org/keywords/mathematical-analysis","display_name":"Mathematical analysis","score":0.1851942539215088},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1371936798095703},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.10842424631118774},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08666267991065979}],"concepts":[{"id":"https://openalex.org/C104250799","wikidata":"https://www.wikidata.org/wiki/Q1780765","display_name":"Companding","level":4,"score":0.7111028432846069},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5197729468345642},{"id":"https://openalex.org/C93357160","wikidata":"https://www.wikidata.org/wiki/Q1545916","display_name":"Limit cycle","level":3,"score":0.5130709409713745},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.5024652481079102},{"id":"https://openalex.org/C11577676","wikidata":"https://www.wikidata.org/wiki/Q134237","display_name":"Square root","level":2,"score":0.4811321794986725},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4649236500263214},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4493723511695862},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.43004146218299866},{"id":"https://openalex.org/C44682112","wikidata":"https://www.wikidata.org/wiki/Q918242","display_name":"Low-pass filter","level":3,"score":0.4235497713088989},{"id":"https://openalex.org/C22597639","wikidata":"https://www.wikidata.org/wiki/Q5449227","display_name":"Filter design","level":3,"score":0.4112861156463623},{"id":"https://openalex.org/C151201525","wikidata":"https://www.wikidata.org/wiki/Q177239","display_name":"Limit (mathematics)","level":2,"score":0.378821462392807},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36093616485595703},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3456958532333374},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3407291769981384},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19240519404411316},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.1851942539215088},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1371936798095703},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.10842424631118774},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08666267991065979},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C40409654","wikidata":"https://www.wikidata.org/wiki/Q375889","display_name":"Orthogonal frequency-division multiplexing","level":3,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2008.4674805","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2008.4674805","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16","score":0.7799999713897705}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1505115196","https://openalex.org/W1972218872","https://openalex.org/W1975752023","https://openalex.org/W1992667090","https://openalex.org/W1996986516","https://openalex.org/W2011338105","https://openalex.org/W2012714360","https://openalex.org/W2014617390","https://openalex.org/W2054648042","https://openalex.org/W2072999313","https://openalex.org/W2075735747","https://openalex.org/W2092132571","https://openalex.org/W2096124425","https://openalex.org/W2096900614","https://openalex.org/W2125655227","https://openalex.org/W2132693218","https://openalex.org/W2133399587","https://openalex.org/W2133615602","https://openalex.org/W2138889413","https://openalex.org/W2143165612","https://openalex.org/W2146757551","https://openalex.org/W2155273897","https://openalex.org/W2168697380","https://openalex.org/W2201771762","https://openalex.org/W2532199513"],"related_works":["https://openalex.org/W2020924756","https://openalex.org/W2368899615","https://openalex.org/W4301184722","https://openalex.org/W4308079908","https://openalex.org/W2361661491","https://openalex.org/W2139909260","https://openalex.org/W1526610477","https://openalex.org/W3006824548","https://openalex.org/W2156114995","https://openalex.org/W1993369384"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,10,33,58,80,84],"second-order":[4],"CMOS":[5,87],"companding":[6],"filter":[7,14,46],"that":[8],"exhibits":[9],"limit":[11],"cycle.":[12],"The":[13],"employs":[15],"the":[16,20,38,42,45,49],"quasi-quadratic":[17],"law":[18],"of":[19,52],"MOS":[21],"transistor":[22],"in":[23,48,83],"strong":[24],"inversion":[25],"and":[26,76],"saturation":[27],"to":[28,36,66,91],"achieve":[29],"compression":[30],"together":[31],"with":[32],"Class-AB":[34],"topology":[35],"extend":[37],"dynamic":[39],"range.":[40],"In":[41],"zero-input":[43,69],"case,":[44],"operates":[47],"manner":[50],"expected":[51],"an":[53],"externally-linear":[54],"circuit.":[55],"However,":[56],"when":[57],"standard":[59],"linear":[60],"IC":[61],"design":[62],"technique":[63],"is":[64],"applied":[65],"it,":[67],"unwanted":[68],"sustained":[70],"oscillations":[71],"may":[72],"be":[73],"observed.":[74],"Simulations":[75],"measurement":[77],"results":[78],"from":[79],"semi-custom":[81],"realization":[82],"0.8":[85],"mum":[86],"process":[88],"are":[89],"used":[90],"explore":[92],"this":[93],"behavior.":[94]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
