{"id":"https://openalex.org/W2148905711","doi":"https://doi.org/10.1109/icecs.2007.4511208","title":"Performance Evaluation of FPGA-Embedded Web Servers","display_name":"Performance Evaluation of FPGA-Embedded Web Servers","publication_year":2007,"publication_date":"2007-12-01","ids":{"openalex":"https://openalex.org/W2148905711","doi":"https://doi.org/10.1109/icecs.2007.4511208","mag":"2148905711"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2007.4511208","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2007.4511208","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021296662","display_name":"Sergio Cuenca-Asensi","orcid":"https://orcid.org/0000-0002-5830-6104"},"institutions":[{"id":"https://openalex.org/I130194489","display_name":"University of Alicante","ror":"https://ror.org/05t8bcz72","country_code":"ES","type":"education","lineage":["https://openalex.org/I130194489"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"S. Cuenca","raw_affiliation_strings":["Department of Information Technology and Computation, University of Alicante, Alicante, Spain. sergio@dtic.ua.es","Department of Information Technology and Computation, University of Alicante, Alicante, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Computation, University of Alicante, Alicante, Spain. sergio@dtic.ua.es","institution_ids":["https://openalex.org/I130194489"]},{"raw_affiliation_string":"Department of Information Technology and Computation, University of Alicante, Alicante, Spain","institution_ids":["https://openalex.org/I130194489"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013909844","display_name":"\u00c1ngel Grediaga","orcid":"https://orcid.org/0000-0002-9519-2265"},"institutions":[{"id":"https://openalex.org/I130194489","display_name":"University of Alicante","ror":"https://ror.org/05t8bcz72","country_code":"ES","type":"education","lineage":["https://openalex.org/I130194489"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"A. Grediaga","raw_affiliation_strings":["Department of Information Technology and Computation, University of Alicante, Alicante, Spain. gredi@dtic.ua.es","Department of Information Technology and Computation, University of Alicante, Alicante, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Computation, University of Alicante, Alicante, Spain. gredi@dtic.ua.es","institution_ids":["https://openalex.org/I130194489"]},{"raw_affiliation_string":"Department of Information Technology and Computation, University of Alicante, Alicante, Spain","institution_ids":["https://openalex.org/I130194489"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040335005","display_name":"H\u00e9ctor Llorens","orcid":null},"institutions":[{"id":"https://openalex.org/I130194489","display_name":"University of Alicante","ror":"https://ror.org/05t8bcz72","country_code":"ES","type":"education","lineage":["https://openalex.org/I130194489"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"H. Llorens","raw_affiliation_strings":["Department of Information Technology and Computation, University of Alicante, Alicante, Spain. halm@alu.ua.es","Department of Information Technology and Computation, University of Alicante, Alicante, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Computation, University of Alicante, Alicante, Spain. halm@alu.ua.es","institution_ids":["https://openalex.org/I130194489"]},{"raw_affiliation_string":"Department of Information Technology and Computation, University of Alicante, Alicante, Spain","institution_ids":["https://openalex.org/I130194489"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001529360","display_name":"Mar\u00eda Ascensi\u00f3n G\u00f3mez Albero","orcid":null},"institutions":[{"id":"https://openalex.org/I130194489","display_name":"University of Alicante","ror":"https://ror.org/05t8bcz72","country_code":"ES","type":"education","lineage":["https://openalex.org/I130194489"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"M. Albero","raw_affiliation_strings":["Department of Information Technology and Computation, University of Alicante, Alicante, Spain. maaa6@alu.ua.es","Department of Information Technology and Computation, University of Alicante, Alicante, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Information Technology and Computation, University of Alicante, Alicante, Spain. maaa6@alu.ua.es","institution_ids":["https://openalex.org/I130194489"]},{"raw_affiliation_string":"Department of Information Technology and Computation, University of Alicante, Alicante, Spain","institution_ids":["https://openalex.org/I130194489"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5021296662"],"corresponding_institution_ids":["https://openalex.org/I130194489"],"apc_list":null,"apc_paid":null,"fwci":1.6229,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.84986439,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1187","last_page":"1190"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8093969225883484},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.789711594581604},{"id":"https://openalex.org/keywords/server","display_name":"Server","score":0.755608081817627},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7034451961517334},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.679549515247345},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6554086208343506},{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.5848163366317749},{"id":"https://openalex.org/keywords/web-server","display_name":"Web server","score":0.5212517380714417},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.45355209708213806},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.42006003856658936},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.38599491119384766},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37422215938568115},{"id":"https://openalex.org/keywords/the-internet","display_name":"The Internet","score":0.15444958209991455},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.14011797308921814}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8093969225883484},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.789711594581604},{"id":"https://openalex.org/C93996380","wikidata":"https://www.wikidata.org/wiki/Q44127","display_name":"Server","level":2,"score":0.755608081817627},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7034451961517334},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.679549515247345},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6554086208343506},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.5848163366317749},{"id":"https://openalex.org/C11392498","wikidata":"https://www.wikidata.org/wiki/Q11288","display_name":"Web server","level":3,"score":0.5212517380714417},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.45355209708213806},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.42006003856658936},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.38599491119384766},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37422215938568115},{"id":"https://openalex.org/C110875604","wikidata":"https://www.wikidata.org/wiki/Q75","display_name":"The Internet","level":2,"score":0.15444958209991455},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.14011797308921814},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2007.4511208","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2007.4511208","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.44999998807907104,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1576049652","https://openalex.org/W2066660519","https://openalex.org/W2103285480","https://openalex.org/W2123296410","https://openalex.org/W2160916964"],"related_works":["https://openalex.org/W4316095964","https://openalex.org/W2383001583","https://openalex.org/W39373273","https://openalex.org/W2771395446","https://openalex.org/W2120447654","https://openalex.org/W2977179488","https://openalex.org/W1995583186","https://openalex.org/W3094215878","https://openalex.org/W1970479385","https://openalex.org/W2025467172"],"abstract_inverted_index":{"Embedded":[0],"web":[1,49],"servers":[2,90],"have":[3,91],"a":[4,8,22,92],"growing":[5],"presence":[6],"in":[7,25],"wide":[9],"range":[10],"of":[11,28,74,104],"fields":[12],"related":[13],"to":[14,34],"consumer":[15],"electronics":[16],"and":[17,63,80,106],"industrial":[18],"applications.":[19],"FPGAs":[20],"are":[21],"valid":[23],"alternative":[24],"the":[26,35,64],"implementation":[27],"these":[29,75],"systems":[30],"adding":[31],"additional":[32],"advantages":[33],"traditional":[36],"architectures":[37],"based":[38,67],"on":[39,52,68],"microprocessors":[40],"or":[41,94],"microcontrollers.":[42],"In":[43],"this":[44],"paper":[45],"we":[46],"introduce":[47],"two":[48],"server":[50],"implementations":[51,76],"FPGA":[53],"devices.":[54],"The":[55,72,85],"first":[56],"uses":[57],"an":[58],"embedded":[59],"hard":[60],"core":[61],"microprocessor":[62],"second":[65],"is":[66],"specifically":[69],"designed":[70],"hardware.":[71],"performance":[73],"has":[77],"been":[78],"evaluated":[79],"compared":[81],"with":[82,101],"commercial":[83],"architectures.":[84],"results":[86],"show":[87],"that":[88],"FPGA-based":[89],"similar":[93],"superior":[95],"throughput":[96],"than":[97],"other":[98],"approaches":[99],"but":[100],"reduced":[102],"consumption":[103],"resources":[105],"low":[107],"clock":[108],"rates.":[109]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-25T13:04:00.132906","created_date":"2025-10-10T00:00:00"}